Kishon Vijay Abraham I e38a45b019 arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane function ... First two lanes of SERDES is connected to PCIe, third lane is connected to QSGMII and the last lane is connected to USB. However, Cadence torrent SERDES doesn't support more than 2 protocols at the same time. Configure it only for PCIe and QSGMII. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20200930122032.23481-6-rogerq@ti.com		2020-09-30 07:34:03 -05:00
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dts	arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane function	2020-09-30 07:34:03 -05:00
.gitignore	.gitignore: add SPDX License Identifier	2020-03-25 11:50:48 +01:00
install.sh
Makefile	arm64: kbuild: remove compressed images on 'make ARCH=arm64 (dist)clean'	2020-01-21 16:28:36 +00:00