forked from Minki/linux
b18d62891a
Pull x86 APIC updates from Thomas Gleixner:
"This update provides a major overhaul of the APIC initialization and
vector allocation code:
- Unification of the APIC and interrupt mode setup which was
scattered all over the place and was hard to follow. This also
distangles the timer setup from the APIC initialization which
brings a clear separation of functionality.
Great detective work from Dou Lyiang!
- Refactoring of the x86 vector allocation mechanism. The existing
code was based on nested loops and rather convoluted APIC callbacks
which had a horrible worst case behaviour and tried to serve all
different use cases in one go. This led to quite odd hacks when
supporting the new managed interupt facility for multiqueue devices
and made it more or less impossible to deal with the vector space
exhaustion which was a major roadblock for server hibernation.
Aside of that the code dealing with cpu hotplug and the system
vectors was disconnected from the actual vector management and
allocation code, which made it hard to follow and maintain.
Utilizing the new bitmap matrix allocator core mechanism, the new
allocator and management code consolidates the handling of system
vectors, legacy vectors, cpu hotplug mechanisms and the actual
allocation which needs to be aware of system and legacy vectors and
hotplug constraints into a single consistent entity.
This has one visible change: The support for multi CPU targets of
interrupts, which is only available on a certain subset of
CPUs/APIC variants has been removed in favour of single interrupt
targets. A proper analysis of the multi CPU target feature revealed
that there is no real advantage as the vast majority of interrupts
end up on the CPU with the lowest APIC id in the set of target CPUs
anyway. That change was agreed on by the relevant folks and allowed
to simplify the implementation significantly and to replace rather
fragile constructs like the vector cleanup IPI with straight
forward and solid code.
Furthermore this allowed to cleanly separate the allocation details
for legacy, normal and managed interrupts:
* Legacy interrupts are not longer wasting 16 vectors
unconditionally
* Managed interrupts have now a guaranteed vector reservation, but
the actual vector assignment happens when the interrupt is
requested. It's guaranteed not to fail.
* Normal interrupts no longer allocate vectors unconditionally
when the interrupt is set up (IO/APIC init or MSI(X) enable).
The mechanism has been switched to a best effort reservation
mode. The actual allocation happens when the interrupt is
requested. Contrary to managed interrupts the request can fail
due to vector space exhaustion, but drivers must handle a fail
of request_irq() anyway. When the interrupt is freed, the vector
is handed back as well.
This solves a long standing problem with large unconditional
vector allocations for a certain class of enterprise devices
which prevented server hibernation due to vector space
exhaustion when the unused allocated vectors had to be migrated
to CPU0 while unplugging all non boot CPUs.
The code has been equipped with trace points and detailed debugfs
information to aid analysis of the vector space"
* 'x86-apic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (60 commits)
x86/vector/msi: Select CONFIG_GENERIC_IRQ_RESERVATION_MODE
PCI/MSI: Set MSI_FLAG_MUST_REACTIVATE in core code
genirq: Add config option for reservation mode
x86/vector: Use correct per cpu variable in free_moved_vector()
x86/apic/vector: Ignore set_affinity call for inactive interrupts
x86/apic: Fix spelling mistake: "symmectic" -> "symmetric"
x86/apic: Use dead_cpu instead of current CPU when cleaning up
ACPI/init: Invoke early ACPI initialization earlier
x86/vector: Respect affinity mask in irq descriptor
x86/irq: Simplify hotplug vector accounting
x86/vector: Switch IOAPIC to global reservation mode
x86/vector/msi: Switch to global reservation mode
x86/vector: Handle managed interrupts proper
x86/io_apic: Reevaluate vector configuration on activate()
iommu/amd: Reevaluate vector configuration on activate()
iommu/vt-d: Reevaluate vector configuration on activate()
x86/apic/msi: Force reactivation of interrupts at startup time
x86/vector: Untangle internal state from irq_cfg
x86/vector: Compile SMP only code conditionally
x86/apic: Remove unused callbacks
...
292 lines
9.2 KiB
C
292 lines
9.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_PLATFORM_H
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#define _ASM_X86_PLATFORM_H
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#include <asm/bootparam.h>
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struct mpc_bus;
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struct mpc_cpu;
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struct mpc_table;
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struct cpuinfo_x86;
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/**
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* struct x86_init_mpparse - platform specific mpparse ops
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* @mpc_record: platform specific mpc record accounting
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* @setup_ioapic_ids: platform specific ioapic id override
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* @mpc_apic_id: platform specific mpc apic id assignment
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* @smp_read_mpc_oem: platform specific oem mpc table setup
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* @mpc_oem_pci_bus: platform specific pci bus setup (default NULL)
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* @mpc_oem_bus_info: platform specific mpc bus info
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* @find_smp_config: find the smp configuration
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* @get_smp_config: get the smp configuration
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*/
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struct x86_init_mpparse {
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void (*mpc_record)(unsigned int mode);
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void (*setup_ioapic_ids)(void);
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int (*mpc_apic_id)(struct mpc_cpu *m);
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void (*smp_read_mpc_oem)(struct mpc_table *mpc);
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void (*mpc_oem_pci_bus)(struct mpc_bus *m);
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void (*mpc_oem_bus_info)(struct mpc_bus *m, char *name);
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void (*find_smp_config)(void);
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void (*get_smp_config)(unsigned int early);
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};
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/**
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* struct x86_init_resources - platform specific resource related ops
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* @probe_roms: probe BIOS roms
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* @reserve_resources: reserve the standard resources for the
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* platform
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* @memory_setup: platform specific memory setup
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*
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*/
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struct x86_init_resources {
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void (*probe_roms)(void);
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void (*reserve_resources)(void);
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char *(*memory_setup)(void);
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};
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/**
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* struct x86_init_irqs - platform specific interrupt setup
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* @pre_vector_init: init code to run before interrupt vectors
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* are set up.
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* @intr_init: interrupt init code
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* @trap_init: platform specific trap setup
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* @intr_mode_init: interrupt delivery mode setup
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*/
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struct x86_init_irqs {
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void (*pre_vector_init)(void);
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void (*intr_init)(void);
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void (*trap_init)(void);
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void (*intr_mode_init)(void);
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};
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/**
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* struct x86_init_oem - oem platform specific customizing functions
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* @arch_setup: platform specific architecture setup
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* @banner: print a platform specific banner
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*/
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struct x86_init_oem {
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void (*arch_setup)(void);
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void (*banner)(void);
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};
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/**
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* struct x86_init_paging - platform specific paging functions
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* @pagetable_init: platform specific paging initialization call to setup
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* the kernel pagetables and prepare accessors functions.
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* Callback must call paging_init(). Called once after the
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* direct mapping for phys memory is available.
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*/
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struct x86_init_paging {
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void (*pagetable_init)(void);
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};
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/**
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* struct x86_init_timers - platform specific timer setup
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* @setup_perpcu_clockev: set up the per cpu clock event device for the
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* boot cpu
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* @timer_init: initialize the platform timer (default PIT/HPET)
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* @wallclock_init: init the wallclock device
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*/
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struct x86_init_timers {
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void (*setup_percpu_clockev)(void);
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void (*timer_init)(void);
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void (*wallclock_init)(void);
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};
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/**
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* struct x86_init_iommu - platform specific iommu setup
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* @iommu_init: platform specific iommu setup
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*/
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struct x86_init_iommu {
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int (*iommu_init)(void);
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};
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/**
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* struct x86_init_pci - platform specific pci init functions
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* @arch_init: platform specific pci arch init call
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* @init: platform specific pci subsystem init
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* @init_irq: platform specific pci irq init
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* @fixup_irqs: platform specific pci irq fixup
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*/
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struct x86_init_pci {
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int (*arch_init)(void);
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int (*init)(void);
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void (*init_irq)(void);
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void (*fixup_irqs)(void);
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};
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/**
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* struct x86_hyper_init - x86 hypervisor init functions
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* @init_platform: platform setup
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* @guest_late_init: guest late init
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* @x2apic_available: X2APIC detection
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* @init_mem_mapping: setup early mappings during init_mem_mapping()
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*/
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struct x86_hyper_init {
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void (*init_platform)(void);
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void (*guest_late_init)(void);
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bool (*x2apic_available)(void);
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void (*init_mem_mapping)(void);
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};
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/**
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* struct x86_init_ops - functions for platform specific setup
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*
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*/
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struct x86_init_ops {
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struct x86_init_resources resources;
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struct x86_init_mpparse mpparse;
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struct x86_init_irqs irqs;
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struct x86_init_oem oem;
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struct x86_init_paging paging;
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struct x86_init_timers timers;
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struct x86_init_iommu iommu;
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struct x86_init_pci pci;
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struct x86_hyper_init hyper;
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};
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/**
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* struct x86_cpuinit_ops - platform specific cpu hotplug setups
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* @setup_percpu_clockev: set up the per cpu clock event device
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* @early_percpu_clock_init: early init of the per cpu clock event device
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*/
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struct x86_cpuinit_ops {
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void (*setup_percpu_clockev)(void);
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void (*early_percpu_clock_init)(void);
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void (*fixup_cpu_id)(struct cpuinfo_x86 *c, int node);
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};
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struct timespec;
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/**
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* struct x86_legacy_devices - legacy x86 devices
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*
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* @pnpbios: this platform can have a PNPBIOS. If this is disabled the platform
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* is known to never have a PNPBIOS.
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*
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* These are devices known to require LPC or ISA bus. The definition of legacy
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* devices adheres to the ACPI 5.2.9.3 IA-PC Boot Architecture flag
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* ACPI_FADT_LEGACY_DEVICES. These devices consist of user visible devices on
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* the LPC or ISA bus. User visible devices are devices that have end-user
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* accessible connectors (for example, LPT parallel port). Legacy devices on
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* the LPC bus consist for example of serial and parallel ports, PS/2 keyboard
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* / mouse, and the floppy disk controller. A system that lacks all known
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* legacy devices can assume all devices can be detected exclusively via
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* standard device enumeration mechanisms including the ACPI namespace.
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*
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* A system which has does not have ACPI_FADT_LEGACY_DEVICES enabled must not
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* have any of the legacy devices enumerated below present.
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*/
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struct x86_legacy_devices {
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int pnpbios;
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};
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/**
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* enum x86_legacy_i8042_state - i8042 keyboard controller state
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* @X86_LEGACY_I8042_PLATFORM_ABSENT: the controller is always absent on
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* given platform/subarch.
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* @X86_LEGACY_I8042_FIRMWARE_ABSENT: firmware reports that the controller
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* is absent.
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* @X86_LEGACY_i8042_EXPECTED_PRESENT: the controller is likely to be
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* present, the i8042 driver should probe for controller existence.
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*/
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enum x86_legacy_i8042_state {
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X86_LEGACY_I8042_PLATFORM_ABSENT,
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X86_LEGACY_I8042_FIRMWARE_ABSENT,
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X86_LEGACY_I8042_EXPECTED_PRESENT,
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};
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/**
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* struct x86_legacy_features - legacy x86 features
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*
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* @i8042: indicated if we expect the device to have i8042 controller
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* present.
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* @rtc: this device has a CMOS real-time clock present
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* @reserve_bios_regions: boot code will search for the EBDA address and the
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* start of the 640k - 1M BIOS region. If false, the platform must
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* ensure that its memory map correctly reserves sub-1MB regions as needed.
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* @devices: legacy x86 devices, refer to struct x86_legacy_devices
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* documentation for further details.
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*/
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struct x86_legacy_features {
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enum x86_legacy_i8042_state i8042;
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int rtc;
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int no_vga;
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int reserve_bios_regions;
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struct x86_legacy_devices devices;
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};
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/**
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* struct x86_hyper_runtime - x86 hypervisor specific runtime callbacks
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*
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* @pin_vcpu: pin current vcpu to specified physical cpu (run rarely)
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*/
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struct x86_hyper_runtime {
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void (*pin_vcpu)(int cpu);
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};
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/**
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* struct x86_platform_ops - platform specific runtime functions
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* @calibrate_cpu: calibrate CPU
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* @calibrate_tsc: calibrate TSC, if different from CPU
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* @get_wallclock: get time from HW clock like RTC etc.
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* @set_wallclock: set time back to HW clock
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* @is_untracked_pat_range exclude from PAT logic
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* @nmi_init enable NMI on cpus
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* @save_sched_clock_state: save state for sched_clock() on suspend
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* @restore_sched_clock_state: restore state for sched_clock() on resume
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* @apic_post_init: adjust apic if needed
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* @legacy: legacy features
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* @set_legacy_features: override legacy features. Use of this callback
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* is highly discouraged. You should only need
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* this if your hardware platform requires further
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* custom fine tuning far beyond what may be
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* possible in x86_early_init_platform_quirks() by
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* only using the current x86_hardware_subarch
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* semantics.
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* @hyper: x86 hypervisor specific runtime callbacks
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*/
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struct x86_platform_ops {
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unsigned long (*calibrate_cpu)(void);
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unsigned long (*calibrate_tsc)(void);
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void (*get_wallclock)(struct timespec *ts);
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int (*set_wallclock)(const struct timespec *ts);
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void (*iommu_shutdown)(void);
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bool (*is_untracked_pat_range)(u64 start, u64 end);
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void (*nmi_init)(void);
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unsigned char (*get_nmi_reason)(void);
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void (*save_sched_clock_state)(void);
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void (*restore_sched_clock_state)(void);
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void (*apic_post_init)(void);
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struct x86_legacy_features legacy;
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void (*set_legacy_features)(void);
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struct x86_hyper_runtime hyper;
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};
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struct pci_dev;
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struct x86_msi_ops {
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int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);
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void (*teardown_msi_irq)(unsigned int irq);
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void (*teardown_msi_irqs)(struct pci_dev *dev);
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void (*restore_msi_irqs)(struct pci_dev *dev);
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};
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struct x86_io_apic_ops {
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unsigned int (*read) (unsigned int apic, unsigned int reg);
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void (*disable)(void);
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};
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extern struct x86_init_ops x86_init;
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extern struct x86_cpuinit_ops x86_cpuinit;
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extern struct x86_platform_ops x86_platform;
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extern struct x86_msi_ops x86_msi;
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extern struct x86_io_apic_ops x86_io_apic_ops;
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extern void x86_early_init_platform_quirks(void);
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extern void x86_init_noop(void);
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extern void x86_init_uint_noop(unsigned int unused);
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#endif
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