forked from Minki/linux
b24413180f
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
439 lines
21 KiB
C
439 lines
21 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef STATE_HI_XML
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#define STATE_HI_XML
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/* Autogenerated file, DO NOT EDIT manually!
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This file was generated by the rules-ng-ng headergen tool in this git repository:
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http://0x04.net/cgit/index.cgi/rules-ng-ng
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git clone git://0x04.net/rules-ng-ng
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The rules-ng-ng source files this header was generated from are:
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- state_hi.xml ( 25620 bytes, from 2016-08-19 22:07:37)
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- common.xml ( 20583 bytes, from 2016-06-07 05:22:38)
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Copyright (C) 2016
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*/
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#define MMU_EXCEPTION_SLAVE_NOT_PRESENT 0x00000001
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#define MMU_EXCEPTION_PAGE_NOT_PRESENT 0x00000002
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#define MMU_EXCEPTION_WRITE_VIOLATION 0x00000003
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#define VIVS_HI 0x00000000
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#define VIVS_HI_CLOCK_CONTROL 0x00000000
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#define VIVS_HI_CLOCK_CONTROL_CLK3D_DIS 0x00000001
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#define VIVS_HI_CLOCK_CONTROL_CLK2D_DIS 0x00000002
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#define VIVS_HI_CLOCK_CONTROL_FSCALE_VAL__MASK 0x000001fc
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#define VIVS_HI_CLOCK_CONTROL_FSCALE_VAL__SHIFT 2
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#define VIVS_HI_CLOCK_CONTROL_FSCALE_VAL(x) (((x) << VIVS_HI_CLOCK_CONTROL_FSCALE_VAL__SHIFT) & VIVS_HI_CLOCK_CONTROL_FSCALE_VAL__MASK)
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#define VIVS_HI_CLOCK_CONTROL_FSCALE_CMD_LOAD 0x00000200
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#define VIVS_HI_CLOCK_CONTROL_DISABLE_RAM_CLK_GATING 0x00000400
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#define VIVS_HI_CLOCK_CONTROL_DISABLE_DEBUG_REGISTERS 0x00000800
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#define VIVS_HI_CLOCK_CONTROL_SOFT_RESET 0x00001000
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#define VIVS_HI_CLOCK_CONTROL_IDLE_3D 0x00010000
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#define VIVS_HI_CLOCK_CONTROL_IDLE_2D 0x00020000
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#define VIVS_HI_CLOCK_CONTROL_IDLE_VG 0x00040000
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#define VIVS_HI_CLOCK_CONTROL_ISOLATE_GPU 0x00080000
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#define VIVS_HI_CLOCK_CONTROL_DEBUG_PIXEL_PIPE__MASK 0x00f00000
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#define VIVS_HI_CLOCK_CONTROL_DEBUG_PIXEL_PIPE__SHIFT 20
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#define VIVS_HI_CLOCK_CONTROL_DEBUG_PIXEL_PIPE(x) (((x) << VIVS_HI_CLOCK_CONTROL_DEBUG_PIXEL_PIPE__SHIFT) & VIVS_HI_CLOCK_CONTROL_DEBUG_PIXEL_PIPE__MASK)
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#define VIVS_HI_IDLE_STATE 0x00000004
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#define VIVS_HI_IDLE_STATE_FE 0x00000001
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#define VIVS_HI_IDLE_STATE_DE 0x00000002
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#define VIVS_HI_IDLE_STATE_PE 0x00000004
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#define VIVS_HI_IDLE_STATE_SH 0x00000008
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#define VIVS_HI_IDLE_STATE_PA 0x00000010
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#define VIVS_HI_IDLE_STATE_SE 0x00000020
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#define VIVS_HI_IDLE_STATE_RA 0x00000040
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#define VIVS_HI_IDLE_STATE_TX 0x00000080
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#define VIVS_HI_IDLE_STATE_VG 0x00000100
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#define VIVS_HI_IDLE_STATE_IM 0x00000200
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#define VIVS_HI_IDLE_STATE_FP 0x00000400
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#define VIVS_HI_IDLE_STATE_TS 0x00000800
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#define VIVS_HI_IDLE_STATE_AXI_LP 0x80000000
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#define VIVS_HI_AXI_CONFIG 0x00000008
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#define VIVS_HI_AXI_CONFIG_AWID__MASK 0x0000000f
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#define VIVS_HI_AXI_CONFIG_AWID__SHIFT 0
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#define VIVS_HI_AXI_CONFIG_AWID(x) (((x) << VIVS_HI_AXI_CONFIG_AWID__SHIFT) & VIVS_HI_AXI_CONFIG_AWID__MASK)
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#define VIVS_HI_AXI_CONFIG_ARID__MASK 0x000000f0
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#define VIVS_HI_AXI_CONFIG_ARID__SHIFT 4
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#define VIVS_HI_AXI_CONFIG_ARID(x) (((x) << VIVS_HI_AXI_CONFIG_ARID__SHIFT) & VIVS_HI_AXI_CONFIG_ARID__MASK)
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#define VIVS_HI_AXI_CONFIG_AWCACHE__MASK 0x00000f00
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#define VIVS_HI_AXI_CONFIG_AWCACHE__SHIFT 8
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#define VIVS_HI_AXI_CONFIG_AWCACHE(x) (((x) << VIVS_HI_AXI_CONFIG_AWCACHE__SHIFT) & VIVS_HI_AXI_CONFIG_AWCACHE__MASK)
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#define VIVS_HI_AXI_CONFIG_ARCACHE__MASK 0x0000f000
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#define VIVS_HI_AXI_CONFIG_ARCACHE__SHIFT 12
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#define VIVS_HI_AXI_CONFIG_ARCACHE(x) (((x) << VIVS_HI_AXI_CONFIG_ARCACHE__SHIFT) & VIVS_HI_AXI_CONFIG_ARCACHE__MASK)
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#define VIVS_HI_AXI_STATUS 0x0000000c
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#define VIVS_HI_AXI_STATUS_WR_ERR_ID__MASK 0x0000000f
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#define VIVS_HI_AXI_STATUS_WR_ERR_ID__SHIFT 0
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#define VIVS_HI_AXI_STATUS_WR_ERR_ID(x) (((x) << VIVS_HI_AXI_STATUS_WR_ERR_ID__SHIFT) & VIVS_HI_AXI_STATUS_WR_ERR_ID__MASK)
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#define VIVS_HI_AXI_STATUS_RD_ERR_ID__MASK 0x000000f0
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#define VIVS_HI_AXI_STATUS_RD_ERR_ID__SHIFT 4
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#define VIVS_HI_AXI_STATUS_RD_ERR_ID(x) (((x) << VIVS_HI_AXI_STATUS_RD_ERR_ID__SHIFT) & VIVS_HI_AXI_STATUS_RD_ERR_ID__MASK)
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#define VIVS_HI_AXI_STATUS_DET_WR_ERR 0x00000100
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#define VIVS_HI_AXI_STATUS_DET_RD_ERR 0x00000200
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#define VIVS_HI_INTR_ACKNOWLEDGE 0x00000010
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#define VIVS_HI_INTR_ACKNOWLEDGE_INTR_VEC__MASK 0x3fffffff
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#define VIVS_HI_INTR_ACKNOWLEDGE_INTR_VEC__SHIFT 0
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#define VIVS_HI_INTR_ACKNOWLEDGE_INTR_VEC(x) (((x) << VIVS_HI_INTR_ACKNOWLEDGE_INTR_VEC__SHIFT) & VIVS_HI_INTR_ACKNOWLEDGE_INTR_VEC__MASK)
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#define VIVS_HI_INTR_ACKNOWLEDGE_MMU_EXCEPTION 0x40000000
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#define VIVS_HI_INTR_ACKNOWLEDGE_AXI_BUS_ERROR 0x80000000
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#define VIVS_HI_INTR_ENBL 0x00000014
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#define VIVS_HI_INTR_ENBL_INTR_ENBL_VEC__MASK 0xffffffff
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#define VIVS_HI_INTR_ENBL_INTR_ENBL_VEC__SHIFT 0
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#define VIVS_HI_INTR_ENBL_INTR_ENBL_VEC(x) (((x) << VIVS_HI_INTR_ENBL_INTR_ENBL_VEC__SHIFT) & VIVS_HI_INTR_ENBL_INTR_ENBL_VEC__MASK)
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#define VIVS_HI_CHIP_IDENTITY 0x00000018
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#define VIVS_HI_CHIP_IDENTITY_FAMILY__MASK 0xff000000
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#define VIVS_HI_CHIP_IDENTITY_FAMILY__SHIFT 24
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#define VIVS_HI_CHIP_IDENTITY_FAMILY(x) (((x) << VIVS_HI_CHIP_IDENTITY_FAMILY__SHIFT) & VIVS_HI_CHIP_IDENTITY_FAMILY__MASK)
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#define VIVS_HI_CHIP_IDENTITY_PRODUCT__MASK 0x00ff0000
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#define VIVS_HI_CHIP_IDENTITY_PRODUCT__SHIFT 16
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#define VIVS_HI_CHIP_IDENTITY_PRODUCT(x) (((x) << VIVS_HI_CHIP_IDENTITY_PRODUCT__SHIFT) & VIVS_HI_CHIP_IDENTITY_PRODUCT__MASK)
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#define VIVS_HI_CHIP_IDENTITY_REVISION__MASK 0x0000f000
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#define VIVS_HI_CHIP_IDENTITY_REVISION__SHIFT 12
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#define VIVS_HI_CHIP_IDENTITY_REVISION(x) (((x) << VIVS_HI_CHIP_IDENTITY_REVISION__SHIFT) & VIVS_HI_CHIP_IDENTITY_REVISION__MASK)
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#define VIVS_HI_CHIP_FEATURE 0x0000001c
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#define VIVS_HI_CHIP_MODEL 0x00000020
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#define VIVS_HI_CHIP_REV 0x00000024
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#define VIVS_HI_CHIP_DATE 0x00000028
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#define VIVS_HI_CHIP_TIME 0x0000002c
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#define VIVS_HI_CHIP_MINOR_FEATURE_0 0x00000034
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#define VIVS_HI_CACHE_CONTROL 0x00000038
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#define VIVS_HI_MEMORY_COUNTER_RESET 0x0000003c
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#define VIVS_HI_PROFILE_READ_BYTES8 0x00000040
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#define VIVS_HI_PROFILE_WRITE_BYTES8 0x00000044
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#define VIVS_HI_CHIP_SPECS 0x00000048
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#define VIVS_HI_CHIP_SPECS_STREAM_COUNT__MASK 0x0000000f
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#define VIVS_HI_CHIP_SPECS_STREAM_COUNT__SHIFT 0
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#define VIVS_HI_CHIP_SPECS_STREAM_COUNT(x) (((x) << VIVS_HI_CHIP_SPECS_STREAM_COUNT__SHIFT) & VIVS_HI_CHIP_SPECS_STREAM_COUNT__MASK)
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#define VIVS_HI_CHIP_SPECS_REGISTER_MAX__MASK 0x000000f0
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#define VIVS_HI_CHIP_SPECS_REGISTER_MAX__SHIFT 4
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#define VIVS_HI_CHIP_SPECS_REGISTER_MAX(x) (((x) << VIVS_HI_CHIP_SPECS_REGISTER_MAX__SHIFT) & VIVS_HI_CHIP_SPECS_REGISTER_MAX__MASK)
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#define VIVS_HI_CHIP_SPECS_THREAD_COUNT__MASK 0x00000f00
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#define VIVS_HI_CHIP_SPECS_THREAD_COUNT__SHIFT 8
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#define VIVS_HI_CHIP_SPECS_THREAD_COUNT(x) (((x) << VIVS_HI_CHIP_SPECS_THREAD_COUNT__SHIFT) & VIVS_HI_CHIP_SPECS_THREAD_COUNT__MASK)
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#define VIVS_HI_CHIP_SPECS_VERTEX_CACHE_SIZE__MASK 0x0001f000
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#define VIVS_HI_CHIP_SPECS_VERTEX_CACHE_SIZE__SHIFT 12
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#define VIVS_HI_CHIP_SPECS_VERTEX_CACHE_SIZE(x) (((x) << VIVS_HI_CHIP_SPECS_VERTEX_CACHE_SIZE__SHIFT) & VIVS_HI_CHIP_SPECS_VERTEX_CACHE_SIZE__MASK)
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#define VIVS_HI_CHIP_SPECS_SHADER_CORE_COUNT__MASK 0x01f00000
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#define VIVS_HI_CHIP_SPECS_SHADER_CORE_COUNT__SHIFT 20
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#define VIVS_HI_CHIP_SPECS_SHADER_CORE_COUNT(x) (((x) << VIVS_HI_CHIP_SPECS_SHADER_CORE_COUNT__SHIFT) & VIVS_HI_CHIP_SPECS_SHADER_CORE_COUNT__MASK)
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#define VIVS_HI_CHIP_SPECS_PIXEL_PIPES__MASK 0x0e000000
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#define VIVS_HI_CHIP_SPECS_PIXEL_PIPES__SHIFT 25
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#define VIVS_HI_CHIP_SPECS_PIXEL_PIPES(x) (((x) << VIVS_HI_CHIP_SPECS_PIXEL_PIPES__SHIFT) & VIVS_HI_CHIP_SPECS_PIXEL_PIPES__MASK)
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#define VIVS_HI_CHIP_SPECS_VERTEX_OUTPUT_BUFFER_SIZE__MASK 0xf0000000
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#define VIVS_HI_CHIP_SPECS_VERTEX_OUTPUT_BUFFER_SIZE__SHIFT 28
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#define VIVS_HI_CHIP_SPECS_VERTEX_OUTPUT_BUFFER_SIZE(x) (((x) << VIVS_HI_CHIP_SPECS_VERTEX_OUTPUT_BUFFER_SIZE__SHIFT) & VIVS_HI_CHIP_SPECS_VERTEX_OUTPUT_BUFFER_SIZE__MASK)
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#define VIVS_HI_PROFILE_WRITE_BURSTS 0x0000004c
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#define VIVS_HI_PROFILE_WRITE_REQUESTS 0x00000050
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#define VIVS_HI_PROFILE_READ_BURSTS 0x00000058
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#define VIVS_HI_PROFILE_READ_REQUESTS 0x0000005c
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#define VIVS_HI_PROFILE_READ_LASTS 0x00000060
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#define VIVS_HI_GP_OUT0 0x00000064
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#define VIVS_HI_GP_OUT1 0x00000068
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#define VIVS_HI_GP_OUT2 0x0000006c
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#define VIVS_HI_AXI_CONTROL 0x00000070
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#define VIVS_HI_AXI_CONTROL_WR_FULL_BURST_MODE 0x00000001
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#define VIVS_HI_CHIP_MINOR_FEATURE_1 0x00000074
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#define VIVS_HI_PROFILE_TOTAL_CYCLES 0x00000078
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#define VIVS_HI_PROFILE_IDLE_CYCLES 0x0000007c
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#define VIVS_HI_CHIP_SPECS_2 0x00000080
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#define VIVS_HI_CHIP_SPECS_2_BUFFER_SIZE__MASK 0x000000ff
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#define VIVS_HI_CHIP_SPECS_2_BUFFER_SIZE__SHIFT 0
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#define VIVS_HI_CHIP_SPECS_2_BUFFER_SIZE(x) (((x) << VIVS_HI_CHIP_SPECS_2_BUFFER_SIZE__SHIFT) & VIVS_HI_CHIP_SPECS_2_BUFFER_SIZE__MASK)
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#define VIVS_HI_CHIP_SPECS_2_INSTRUCTION_COUNT__MASK 0x0000ff00
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#define VIVS_HI_CHIP_SPECS_2_INSTRUCTION_COUNT__SHIFT 8
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#define VIVS_HI_CHIP_SPECS_2_INSTRUCTION_COUNT(x) (((x) << VIVS_HI_CHIP_SPECS_2_INSTRUCTION_COUNT__SHIFT) & VIVS_HI_CHIP_SPECS_2_INSTRUCTION_COUNT__MASK)
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#define VIVS_HI_CHIP_SPECS_2_NUM_CONSTANTS__MASK 0xffff0000
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#define VIVS_HI_CHIP_SPECS_2_NUM_CONSTANTS__SHIFT 16
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#define VIVS_HI_CHIP_SPECS_2_NUM_CONSTANTS(x) (((x) << VIVS_HI_CHIP_SPECS_2_NUM_CONSTANTS__SHIFT) & VIVS_HI_CHIP_SPECS_2_NUM_CONSTANTS__MASK)
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#define VIVS_HI_CHIP_MINOR_FEATURE_2 0x00000084
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#define VIVS_HI_CHIP_MINOR_FEATURE_3 0x00000088
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#define VIVS_HI_CHIP_SPECS_3 0x0000008c
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#define VIVS_HI_CHIP_SPECS_3_VARYINGS_COUNT__MASK 0x000001f0
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#define VIVS_HI_CHIP_SPECS_3_VARYINGS_COUNT__SHIFT 4
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#define VIVS_HI_CHIP_SPECS_3_VARYINGS_COUNT(x) (((x) << VIVS_HI_CHIP_SPECS_3_VARYINGS_COUNT__SHIFT) & VIVS_HI_CHIP_SPECS_3_VARYINGS_COUNT__MASK)
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#define VIVS_HI_CHIP_SPECS_3_GPU_CORE_COUNT__MASK 0x00000007
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#define VIVS_HI_CHIP_SPECS_3_GPU_CORE_COUNT__SHIFT 0
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#define VIVS_HI_CHIP_SPECS_3_GPU_CORE_COUNT(x) (((x) << VIVS_HI_CHIP_SPECS_3_GPU_CORE_COUNT__SHIFT) & VIVS_HI_CHIP_SPECS_3_GPU_CORE_COUNT__MASK)
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#define VIVS_HI_CHIP_MINOR_FEATURE_4 0x00000094
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#define VIVS_HI_CHIP_SPECS_4 0x0000009c
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#define VIVS_HI_CHIP_SPECS_4_STREAM_COUNT__MASK 0x0001f000
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#define VIVS_HI_CHIP_SPECS_4_STREAM_COUNT__SHIFT 12
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#define VIVS_HI_CHIP_SPECS_4_STREAM_COUNT(x) (((x) << VIVS_HI_CHIP_SPECS_4_STREAM_COUNT__SHIFT) & VIVS_HI_CHIP_SPECS_4_STREAM_COUNT__MASK)
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#define VIVS_HI_CHIP_MINOR_FEATURE_5 0x000000a0
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#define VIVS_HI_CHIP_PRODUCT_ID 0x000000a8
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#define VIVS_PM 0x00000000
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#define VIVS_PM_POWER_CONTROLS 0x00000100
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#define VIVS_PM_POWER_CONTROLS_ENABLE_MODULE_CLOCK_GATING 0x00000001
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#define VIVS_PM_POWER_CONTROLS_DISABLE_STALL_MODULE_CLOCK_GATING 0x00000002
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#define VIVS_PM_POWER_CONTROLS_DISABLE_STARVE_MODULE_CLOCK_GATING 0x00000004
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#define VIVS_PM_POWER_CONTROLS_TURN_ON_COUNTER__MASK 0x000000f0
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#define VIVS_PM_POWER_CONTROLS_TURN_ON_COUNTER__SHIFT 4
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#define VIVS_PM_POWER_CONTROLS_TURN_ON_COUNTER(x) (((x) << VIVS_PM_POWER_CONTROLS_TURN_ON_COUNTER__SHIFT) & VIVS_PM_POWER_CONTROLS_TURN_ON_COUNTER__MASK)
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#define VIVS_PM_POWER_CONTROLS_TURN_OFF_COUNTER__MASK 0xffff0000
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#define VIVS_PM_POWER_CONTROLS_TURN_OFF_COUNTER__SHIFT 16
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#define VIVS_PM_POWER_CONTROLS_TURN_OFF_COUNTER(x) (((x) << VIVS_PM_POWER_CONTROLS_TURN_OFF_COUNTER__SHIFT) & VIVS_PM_POWER_CONTROLS_TURN_OFF_COUNTER__MASK)
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#define VIVS_PM_MODULE_CONTROLS 0x00000104
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#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_FE 0x00000001
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#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_DE 0x00000002
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#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_PE 0x00000004
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#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_SH 0x00000008
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#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_PA 0x00000010
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#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_SE 0x00000020
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#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA 0x00000040
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#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_TX 0x00000080
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#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA_EZ 0x00010000
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#define VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA_HZ 0x00020000
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#define VIVS_PM_MODULE_STATUS 0x00000108
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#define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_FE 0x00000001
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#define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_DE 0x00000002
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#define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_PE 0x00000004
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#define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_SH 0x00000008
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#define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_PA 0x00000010
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#define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_SE 0x00000020
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#define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_RA 0x00000040
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#define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_TX 0x00000080
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#define VIVS_PM_PULSE_EATER 0x0000010c
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#define VIVS_MMUv2 0x00000000
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#define VIVS_MMUv2_SAFE_ADDRESS 0x00000180
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#define VIVS_MMUv2_CONFIGURATION 0x00000184
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#define VIVS_MMUv2_CONFIGURATION_MODE__MASK 0x00000001
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#define VIVS_MMUv2_CONFIGURATION_MODE__SHIFT 0
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#define VIVS_MMUv2_CONFIGURATION_MODE_MODE4_K 0x00000000
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#define VIVS_MMUv2_CONFIGURATION_MODE_MODE1_K 0x00000001
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#define VIVS_MMUv2_CONFIGURATION_MODE_MASK 0x00000008
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#define VIVS_MMUv2_CONFIGURATION_FLUSH__MASK 0x00000010
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#define VIVS_MMUv2_CONFIGURATION_FLUSH__SHIFT 4
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#define VIVS_MMUv2_CONFIGURATION_FLUSH_FLUSH 0x00000010
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#define VIVS_MMUv2_CONFIGURATION_FLUSH_MASK 0x00000080
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#define VIVS_MMUv2_CONFIGURATION_ADDRESS_MASK 0x00000100
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#define VIVS_MMUv2_CONFIGURATION_ADDRESS__MASK 0xfffffc00
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#define VIVS_MMUv2_CONFIGURATION_ADDRESS__SHIFT 10
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#define VIVS_MMUv2_CONFIGURATION_ADDRESS(x) (((x) << VIVS_MMUv2_CONFIGURATION_ADDRESS__SHIFT) & VIVS_MMUv2_CONFIGURATION_ADDRESS__MASK)
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#define VIVS_MMUv2_STATUS 0x00000188
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#define VIVS_MMUv2_STATUS_EXCEPTION0__MASK 0x00000003
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#define VIVS_MMUv2_STATUS_EXCEPTION0__SHIFT 0
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#define VIVS_MMUv2_STATUS_EXCEPTION0(x) (((x) << VIVS_MMUv2_STATUS_EXCEPTION0__SHIFT) & VIVS_MMUv2_STATUS_EXCEPTION0__MASK)
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#define VIVS_MMUv2_STATUS_EXCEPTION1__MASK 0x00000030
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#define VIVS_MMUv2_STATUS_EXCEPTION1__SHIFT 4
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#define VIVS_MMUv2_STATUS_EXCEPTION1(x) (((x) << VIVS_MMUv2_STATUS_EXCEPTION1__SHIFT) & VIVS_MMUv2_STATUS_EXCEPTION1__MASK)
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#define VIVS_MMUv2_STATUS_EXCEPTION2__MASK 0x00000300
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#define VIVS_MMUv2_STATUS_EXCEPTION2__SHIFT 8
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#define VIVS_MMUv2_STATUS_EXCEPTION2(x) (((x) << VIVS_MMUv2_STATUS_EXCEPTION2__SHIFT) & VIVS_MMUv2_STATUS_EXCEPTION2__MASK)
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#define VIVS_MMUv2_STATUS_EXCEPTION3__MASK 0x00003000
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#define VIVS_MMUv2_STATUS_EXCEPTION3__SHIFT 12
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#define VIVS_MMUv2_STATUS_EXCEPTION3(x) (((x) << VIVS_MMUv2_STATUS_EXCEPTION3__SHIFT) & VIVS_MMUv2_STATUS_EXCEPTION3__MASK)
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#define VIVS_MMUv2_CONTROL 0x0000018c
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#define VIVS_MMUv2_CONTROL_ENABLE 0x00000001
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#define VIVS_MMUv2_EXCEPTION_ADDR(i0) (0x00000190 + 0x4*(i0))
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#define VIVS_MMUv2_EXCEPTION_ADDR__ESIZE 0x00000004
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#define VIVS_MMUv2_EXCEPTION_ADDR__LEN 0x00000004
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#define VIVS_MC 0x00000000
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#define VIVS_MC_MMU_FE_PAGE_TABLE 0x00000400
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#define VIVS_MC_MMU_TX_PAGE_TABLE 0x00000404
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#define VIVS_MC_MMU_PE_PAGE_TABLE 0x00000408
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#define VIVS_MC_MMU_PEZ_PAGE_TABLE 0x0000040c
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#define VIVS_MC_MMU_RA_PAGE_TABLE 0x00000410
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#define VIVS_MC_DEBUG_MEMORY 0x00000414
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#define VIVS_MC_DEBUG_MEMORY_SPECIAL_PATCH_GC320 0x00000008
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#define VIVS_MC_DEBUG_MEMORY_FAST_CLEAR_BYPASS 0x00100000
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#define VIVS_MC_DEBUG_MEMORY_COMPRESSION_BYPASS 0x00200000
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#define VIVS_MC_MEMORY_BASE_ADDR_RA 0x00000418
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#define VIVS_MC_MEMORY_BASE_ADDR_FE 0x0000041c
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#define VIVS_MC_MEMORY_BASE_ADDR_TX 0x00000420
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#define VIVS_MC_MEMORY_BASE_ADDR_PEZ 0x00000424
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#define VIVS_MC_MEMORY_BASE_ADDR_PE 0x00000428
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#define VIVS_MC_MEMORY_TIMING_CONTROL 0x0000042c
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#define VIVS_MC_MEMORY_FLUSH 0x00000430
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#define VIVS_MC_PROFILE_CYCLE_COUNTER 0x00000438
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#define VIVS_MC_DEBUG_READ0 0x0000043c
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#define VIVS_MC_DEBUG_READ1 0x00000440
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#define VIVS_MC_DEBUG_WRITE 0x00000444
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#define VIVS_MC_PROFILE_RA_READ 0x00000448
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#define VIVS_MC_PROFILE_TX_READ 0x0000044c
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#define VIVS_MC_PROFILE_FE_READ 0x00000450
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#define VIVS_MC_PROFILE_PE_READ 0x00000454
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#define VIVS_MC_PROFILE_DE_READ 0x00000458
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#define VIVS_MC_PROFILE_SH_READ 0x0000045c
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#define VIVS_MC_PROFILE_PA_READ 0x00000460
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#define VIVS_MC_PROFILE_SE_READ 0x00000464
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#define VIVS_MC_PROFILE_MC_READ 0x00000468
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#define VIVS_MC_PROFILE_HI_READ 0x0000046c
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#define VIVS_MC_PROFILE_CONFIG0 0x00000470
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#define VIVS_MC_PROFILE_CONFIG0_FE__MASK 0x0000000f
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#define VIVS_MC_PROFILE_CONFIG0_FE__SHIFT 0
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#define VIVS_MC_PROFILE_CONFIG0_FE_RESET 0x0000000f
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#define VIVS_MC_PROFILE_CONFIG0_DE__MASK 0x00000f00
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#define VIVS_MC_PROFILE_CONFIG0_DE__SHIFT 8
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#define VIVS_MC_PROFILE_CONFIG0_DE_RESET 0x00000f00
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#define VIVS_MC_PROFILE_CONFIG0_PE__MASK 0x000f0000
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#define VIVS_MC_PROFILE_CONFIG0_PE__SHIFT 16
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#define VIVS_MC_PROFILE_CONFIG0_PE_PIXEL_COUNT_KILLED_BY_COLOR_PIPE 0x00000000
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#define VIVS_MC_PROFILE_CONFIG0_PE_PIXEL_COUNT_KILLED_BY_DEPTH_PIPE 0x00010000
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#define VIVS_MC_PROFILE_CONFIG0_PE_PIXEL_COUNT_DRAWN_BY_COLOR_PIPE 0x00020000
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#define VIVS_MC_PROFILE_CONFIG0_PE_PIXEL_COUNT_DRAWN_BY_DEPTH_PIPE 0x00030000
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#define VIVS_MC_PROFILE_CONFIG0_PE_PIXELS_RENDERED_2D 0x000b0000
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#define VIVS_MC_PROFILE_CONFIG0_PE_RESET 0x000f0000
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#define VIVS_MC_PROFILE_CONFIG0_SH__MASK 0x0f000000
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#define VIVS_MC_PROFILE_CONFIG0_SH__SHIFT 24
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#define VIVS_MC_PROFILE_CONFIG0_SH_SHADER_CYCLES 0x04000000
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#define VIVS_MC_PROFILE_CONFIG0_SH_PS_INST_COUNTER 0x07000000
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#define VIVS_MC_PROFILE_CONFIG0_SH_RENDERED_PIXEL_COUNTER 0x08000000
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#define VIVS_MC_PROFILE_CONFIG0_SH_VS_INST_COUNTER 0x09000000
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#define VIVS_MC_PROFILE_CONFIG0_SH_RENDERED_VERTICE_COUNTER 0x0a000000
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#define VIVS_MC_PROFILE_CONFIG0_SH_VTX_BRANCH_INST_COUNTER 0x0b000000
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#define VIVS_MC_PROFILE_CONFIG0_SH_VTX_TEXLD_INST_COUNTER 0x0c000000
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#define VIVS_MC_PROFILE_CONFIG0_SH_PXL_BRANCH_INST_COUNTER 0x0d000000
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#define VIVS_MC_PROFILE_CONFIG0_SH_PXL_TEXLD_INST_COUNTER 0x0e000000
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#define VIVS_MC_PROFILE_CONFIG0_SH_RESET 0x0f000000
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#define VIVS_MC_PROFILE_CONFIG1 0x00000474
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#define VIVS_MC_PROFILE_CONFIG1_PA__MASK 0x0000000f
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#define VIVS_MC_PROFILE_CONFIG1_PA__SHIFT 0
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#define VIVS_MC_PROFILE_CONFIG1_PA_INPUT_VTX_COUNTER 0x00000003
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#define VIVS_MC_PROFILE_CONFIG1_PA_INPUT_PRIM_COUNTER 0x00000004
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#define VIVS_MC_PROFILE_CONFIG1_PA_OUTPUT_PRIM_COUNTER 0x00000005
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#define VIVS_MC_PROFILE_CONFIG1_PA_DEPTH_CLIPPED_COUNTER 0x00000006
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#define VIVS_MC_PROFILE_CONFIG1_PA_TRIVIAL_REJECTED_COUNTER 0x00000007
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#define VIVS_MC_PROFILE_CONFIG1_PA_CULLED_COUNTER 0x00000008
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#define VIVS_MC_PROFILE_CONFIG1_PA_RESET 0x0000000f
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#define VIVS_MC_PROFILE_CONFIG1_SE__MASK 0x00000f00
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#define VIVS_MC_PROFILE_CONFIG1_SE__SHIFT 8
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#define VIVS_MC_PROFILE_CONFIG1_SE_CULLED_TRIANGLE_COUNT 0x00000000
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#define VIVS_MC_PROFILE_CONFIG1_SE_CULLED_LINES_COUNT 0x00000100
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#define VIVS_MC_PROFILE_CONFIG1_SE_RESET 0x00000f00
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#define VIVS_MC_PROFILE_CONFIG1_RA__MASK 0x000f0000
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#define VIVS_MC_PROFILE_CONFIG1_RA__SHIFT 16
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#define VIVS_MC_PROFILE_CONFIG1_RA_VALID_PIXEL_COUNT 0x00000000
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#define VIVS_MC_PROFILE_CONFIG1_RA_TOTAL_QUAD_COUNT 0x00010000
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#define VIVS_MC_PROFILE_CONFIG1_RA_VALID_QUAD_COUNT_AFTER_EARLY_Z 0x00020000
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#define VIVS_MC_PROFILE_CONFIG1_RA_TOTAL_PRIMITIVE_COUNT 0x00030000
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#define VIVS_MC_PROFILE_CONFIG1_RA_PIPE_CACHE_MISS_COUNTER 0x00090000
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#define VIVS_MC_PROFILE_CONFIG1_RA_PREFETCH_CACHE_MISS_COUNTER 0x000a0000
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#define VIVS_MC_PROFILE_CONFIG1_RA_CULLED_QUAD_COUNT 0x000b0000
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#define VIVS_MC_PROFILE_CONFIG1_RA_RESET 0x000f0000
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#define VIVS_MC_PROFILE_CONFIG1_TX__MASK 0x0f000000
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#define VIVS_MC_PROFILE_CONFIG1_TX__SHIFT 24
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#define VIVS_MC_PROFILE_CONFIG1_TX_TOTAL_BILINEAR_REQUESTS 0x00000000
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#define VIVS_MC_PROFILE_CONFIG1_TX_TOTAL_TRILINEAR_REQUESTS 0x01000000
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#define VIVS_MC_PROFILE_CONFIG1_TX_TOTAL_DISCARDED_TEXTURE_REQUESTS 0x02000000
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#define VIVS_MC_PROFILE_CONFIG1_TX_TOTAL_TEXTURE_REQUESTS 0x03000000
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#define VIVS_MC_PROFILE_CONFIG1_TX_UNKNOWN 0x04000000
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#define VIVS_MC_PROFILE_CONFIG1_TX_MEM_READ_COUNT 0x05000000
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#define VIVS_MC_PROFILE_CONFIG1_TX_MEM_READ_IN_8B_COUNT 0x06000000
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#define VIVS_MC_PROFILE_CONFIG1_TX_CACHE_MISS_COUNT 0x07000000
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#define VIVS_MC_PROFILE_CONFIG1_TX_CACHE_HIT_TEXEL_COUNT 0x08000000
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#define VIVS_MC_PROFILE_CONFIG1_TX_CACHE_MISS_TEXEL_COUNT 0x09000000
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#define VIVS_MC_PROFILE_CONFIG1_TX_RESET 0x0f000000
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#define VIVS_MC_PROFILE_CONFIG2 0x00000478
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#define VIVS_MC_PROFILE_CONFIG2_MC__MASK 0x0000000f
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#define VIVS_MC_PROFILE_CONFIG2_MC__SHIFT 0
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#define VIVS_MC_PROFILE_CONFIG2_MC_TOTAL_READ_REQ_8B_FROM_PIPELINE 0x00000001
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#define VIVS_MC_PROFILE_CONFIG2_MC_TOTAL_READ_REQ_8B_FROM_IP 0x00000002
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#define VIVS_MC_PROFILE_CONFIG2_MC_TOTAL_WRITE_REQ_8B_FROM_PIPELINE 0x00000003
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#define VIVS_MC_PROFILE_CONFIG2_MC_RESET 0x0000000f
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#define VIVS_MC_PROFILE_CONFIG2_HI__MASK 0x00000f00
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#define VIVS_MC_PROFILE_CONFIG2_HI__SHIFT 8
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#define VIVS_MC_PROFILE_CONFIG2_HI_AXI_CYCLES_READ_REQUEST_STALLED 0x00000000
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#define VIVS_MC_PROFILE_CONFIG2_HI_AXI_CYCLES_WRITE_REQUEST_STALLED 0x00000100
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#define VIVS_MC_PROFILE_CONFIG2_HI_AXI_CYCLES_WRITE_DATA_STALLED 0x00000200
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#define VIVS_MC_PROFILE_CONFIG2_HI_RESET 0x00000f00
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#define VIVS_MC_PROFILE_CONFIG3 0x0000047c
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#define VIVS_MC_BUS_CONFIG 0x00000480
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#define VIVS_MC_BUS_CONFIG_FE_BUS_CONFIG__MASK 0x0000000f
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#define VIVS_MC_BUS_CONFIG_FE_BUS_CONFIG__SHIFT 0
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#define VIVS_MC_BUS_CONFIG_FE_BUS_CONFIG(x) (((x) << VIVS_MC_BUS_CONFIG_FE_BUS_CONFIG__SHIFT) & VIVS_MC_BUS_CONFIG_FE_BUS_CONFIG__MASK)
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#define VIVS_MC_BUS_CONFIG_TX_BUS_CONFIG__MASK 0x000000f0
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#define VIVS_MC_BUS_CONFIG_TX_BUS_CONFIG__SHIFT 4
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#define VIVS_MC_BUS_CONFIG_TX_BUS_CONFIG(x) (((x) << VIVS_MC_BUS_CONFIG_TX_BUS_CONFIG__SHIFT) & VIVS_MC_BUS_CONFIG_TX_BUS_CONFIG__MASK)
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#define VIVS_MC_START_COMPOSITION 0x00000554
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#define VIVS_MC_128B_MERGE 0x00000558
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#endif /* STATE_HI_XML */
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