forked from Minki/linux
eb83479e18
Move Lynxpoint GPIO driver under Intel pin control umbrella for further transformation to a real pin control driver. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
136 lines
3.8 KiB
Plaintext
136 lines
3.8 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0
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# Intel pin control drivers
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if (X86 || COMPILE_TEST)
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config PINCTRL_BAYTRAIL
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bool "Intel Baytrail GPIO pin control"
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depends on ACPI
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select GPIOLIB
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select GPIOLIB_IRQCHIP
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select PINMUX
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select PINCONF
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select GENERIC_PINCONF
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help
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driver for memory mapped GPIO functionality on Intel Baytrail
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platforms. Supports 3 banks with 102, 28 and 44 gpios.
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Most pins are usually muxed to some other functionality by firmware,
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so only a small amount is available for gpio use.
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Requires ACPI device enumeration code to set up a platform device.
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config PINCTRL_CHERRYVIEW
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tristate "Intel Cherryview/Braswell pinctrl and GPIO driver"
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depends on ACPI
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select PINMUX
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select PINCONF
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select GENERIC_PINCONF
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select GPIOLIB
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select GPIOLIB_IRQCHIP
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help
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Cherryview/Braswell pinctrl driver provides an interface that
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allows configuring of SoC pins and using them as GPIOs.
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config PINCTRL_LYNXPOINT
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tristate "Intel Lynxpoint pinctrl and GPIO driver"
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depends on ACPI
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select GPIOLIB
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select GPIOLIB_IRQCHIP
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help
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Lynxpoint is the PCH of Intel Haswell. This pinctrl driver
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provides an interface that allows configuring of PCH pins and
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using them as GPIOs.
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config PINCTRL_MERRIFIELD
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tristate "Intel Merrifield pinctrl driver"
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depends on X86_INTEL_MID
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select PINMUX
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select PINCONF
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select GENERIC_PINCONF
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help
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Merrifield Family-Level Interface Shim (FLIS) driver provides an
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interface that allows configuring of SoC pins and using them as
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GPIOs.
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config PINCTRL_INTEL
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tristate
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select PINMUX
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select PINCONF
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select GENERIC_PINCONF
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select GPIOLIB
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select GPIOLIB_IRQCHIP
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config PINCTRL_BROXTON
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tristate "Intel Broxton pinctrl and GPIO driver"
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depends on ACPI
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select PINCTRL_INTEL
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help
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Broxton pinctrl driver provides an interface that allows
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configuring of SoC pins and using them as GPIOs.
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config PINCTRL_CANNONLAKE
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tristate "Intel Cannon Lake PCH pinctrl and GPIO driver"
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depends on ACPI
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select PINCTRL_INTEL
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help
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This pinctrl driver provides an interface that allows configuring
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of Intel Cannon Lake PCH pins and using them as GPIOs.
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config PINCTRL_CEDARFORK
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tristate "Intel Cedar Fork pinctrl and GPIO driver"
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depends on ACPI
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select PINCTRL_INTEL
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help
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This pinctrl driver provides an interface that allows configuring
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of Intel Cedar Fork PCH pins and using them as GPIOs.
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config PINCTRL_DENVERTON
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tristate "Intel Denverton pinctrl and GPIO driver"
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depends on ACPI
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select PINCTRL_INTEL
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help
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This pinctrl driver provides an interface that allows configuring
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of Intel Denverton SoC pins and using them as GPIOs.
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config PINCTRL_GEMINILAKE
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tristate "Intel Gemini Lake SoC pinctrl and GPIO driver"
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depends on ACPI
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select PINCTRL_INTEL
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help
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This pinctrl driver provides an interface that allows configuring
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of Intel Gemini Lake SoC pins and using them as GPIOs.
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config PINCTRL_ICELAKE
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tristate "Intel Ice Lake PCH pinctrl and GPIO driver"
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depends on ACPI
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select PINCTRL_INTEL
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help
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This pinctrl driver provides an interface that allows configuring
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of Intel Ice Lake PCH pins and using them as GPIOs.
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config PINCTRL_LEWISBURG
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tristate "Intel Lewisburg pinctrl and GPIO driver"
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depends on ACPI
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select PINCTRL_INTEL
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help
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This pinctrl driver provides an interface that allows configuring
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of Intel Lewisburg pins and using them as GPIOs.
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config PINCTRL_SUNRISEPOINT
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tristate "Intel Sunrisepoint pinctrl and GPIO driver"
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depends on ACPI
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select PINCTRL_INTEL
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help
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Sunrisepoint is the PCH of Intel Skylake. This pinctrl driver
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provides an interface that allows configuring of PCH pins and
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using them as GPIOs.
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config PINCTRL_TIGERLAKE
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tristate "Intel Tiger Lake pinctrl and GPIO driver"
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depends on ACPI
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select PINCTRL_INTEL
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help
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This pinctrl driver provides an interface that allows configuring
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of Intel Tiger Lake PCH pins and using them as GPIOs.
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endif
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