forked from Minki/linux
2a6eac9638
'reinject' is never initialized 't_ops' only serves as indirection to lapic_is_periodic; call that directly instead 'kvm' is never used 'vcpu' can be derived via container_of Remove these fields. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
82 lines
2.8 KiB
C
82 lines
2.8 KiB
C
#ifndef __KVM_X86_LAPIC_H
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#define __KVM_X86_LAPIC_H
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#include "iodev.h"
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#include <linux/kvm_host.h>
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struct kvm_timer {
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struct hrtimer timer;
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s64 period; /* unit: ns */
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u32 timer_mode_mask;
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u64 tscdeadline;
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atomic_t pending; /* accumulated triggered timers */
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};
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struct kvm_lapic {
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unsigned long base_address;
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struct kvm_io_device dev;
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struct kvm_timer lapic_timer;
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u32 divide_count;
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struct kvm_vcpu *vcpu;
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bool irr_pending;
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/* Number of bits set in ISR. */
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s16 isr_count;
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/* The highest vector set in ISR; if -1 - invalid, must scan ISR. */
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int highest_isr_cache;
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/**
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* APIC register page. The layout matches the register layout seen by
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* the guest 1:1, because it is accessed by the vmx microcode.
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* Note: Only one register, the TPR, is used by the microcode.
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*/
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void *regs;
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gpa_t vapic_addr;
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struct page *vapic_page;
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};
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int kvm_create_lapic(struct kvm_vcpu *vcpu);
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void kvm_free_lapic(struct kvm_vcpu *vcpu);
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int kvm_apic_has_interrupt(struct kvm_vcpu *vcpu);
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int kvm_apic_accept_pic_intr(struct kvm_vcpu *vcpu);
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int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu);
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void kvm_lapic_reset(struct kvm_vcpu *vcpu);
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u64 kvm_lapic_get_cr8(struct kvm_vcpu *vcpu);
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void kvm_lapic_set_tpr(struct kvm_vcpu *vcpu, unsigned long cr8);
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void kvm_lapic_set_eoi(struct kvm_vcpu *vcpu);
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void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value);
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u64 kvm_lapic_get_base(struct kvm_vcpu *vcpu);
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void kvm_apic_set_version(struct kvm_vcpu *vcpu);
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int kvm_apic_match_physical_addr(struct kvm_lapic *apic, u16 dest);
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int kvm_apic_match_logical_addr(struct kvm_lapic *apic, u8 mda);
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int kvm_apic_set_irq(struct kvm_vcpu *vcpu, struct kvm_lapic_irq *irq);
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int kvm_apic_local_deliver(struct kvm_lapic *apic, int lvt_type);
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u64 kvm_get_apic_base(struct kvm_vcpu *vcpu);
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void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data);
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void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu);
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int kvm_lapic_enabled(struct kvm_vcpu *vcpu);
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bool kvm_apic_present(struct kvm_vcpu *vcpu);
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int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu);
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u64 kvm_get_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu);
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void kvm_set_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu, u64 data);
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void kvm_lapic_set_vapic_addr(struct kvm_vcpu *vcpu, gpa_t vapic_addr);
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void kvm_lapic_sync_from_vapic(struct kvm_vcpu *vcpu);
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void kvm_lapic_sync_to_vapic(struct kvm_vcpu *vcpu);
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int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data);
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int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
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int kvm_hv_vapic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data);
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int kvm_hv_vapic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
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static inline bool kvm_hv_vapic_assist_page_enabled(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.hv_vapic & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE;
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}
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int kvm_lapic_enable_pv_eoi(struct kvm_vcpu *vcpu, u64 data);
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#endif
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