forked from Minki/linux
d767af5e66
This partly reverts commits553600502b(ARM: sunxi: Remove reset code from the platform) and5e669ec583(ARM: sunxi: Remove init_machine callback) for the sun4i, sun5i and sun7i families. This is needed because the watchdog counterpart of these commits was dropped, and didn't make it into 3.16. In order to still be able to reboot the board, we need to reintroduce that code. Of course, the long term view is still to get rid of that code in mach-sunxi. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Olof Johansson <olof@lixom.net>
133 lines
3.3 KiB
C
133 lines
3.3 KiB
C
/*
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* Device Tree support for Allwinner A1X SoCs
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*
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* Copyright (C) 2012 Maxime Ripard
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*
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/clk-provider.h>
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#include <linux/clocksource.h>
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#include <linux/delay.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <linux/io.h>
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#include <linux/reboot.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/system_misc.h>
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#define SUN4I_WATCHDOG_CTRL_REG 0x00
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#define SUN4I_WATCHDOG_CTRL_RESTART BIT(0)
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#define SUN4I_WATCHDOG_MODE_REG 0x04
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#define SUN4I_WATCHDOG_MODE_ENABLE BIT(0)
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#define SUN4I_WATCHDOG_MODE_RESET_ENABLE BIT(1)
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#define SUN6I_WATCHDOG1_IRQ_REG 0x00
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#define SUN6I_WATCHDOG1_CTRL_REG 0x10
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#define SUN6I_WATCHDOG1_CTRL_RESTART BIT(0)
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#define SUN6I_WATCHDOG1_CONFIG_REG 0x14
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#define SUN6I_WATCHDOG1_CONFIG_RESTART BIT(0)
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#define SUN6I_WATCHDOG1_CONFIG_IRQ BIT(1)
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#define SUN6I_WATCHDOG1_MODE_REG 0x18
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#define SUN6I_WATCHDOG1_MODE_ENABLE BIT(0)
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static void __iomem *wdt_base;
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static void sun4i_restart(enum reboot_mode mode, const char *cmd)
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{
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if (!wdt_base)
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return;
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/* Enable timer and set reset bit in the watchdog */
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writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE,
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wdt_base + SUN4I_WATCHDOG_MODE_REG);
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/*
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* Restart the watchdog. The default (and lowest) interval
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* value for the watchdog is 0.5s.
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*/
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writel(SUN4I_WATCHDOG_CTRL_RESTART, wdt_base + SUN4I_WATCHDOG_CTRL_REG);
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while (1) {
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mdelay(5);
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writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE,
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wdt_base + SUN4I_WATCHDOG_MODE_REG);
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}
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}
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static struct of_device_id sunxi_restart_ids[] = {
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{ .compatible = "allwinner,sun4i-a10-wdt" },
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{ /*sentinel*/ }
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};
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static void sunxi_setup_restart(void)
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{
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struct device_node *np;
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np = of_find_matching_node(NULL, sunxi_restart_ids);
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if (WARN(!np, "unable to setup watchdog restart"))
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return;
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wdt_base = of_iomap(np, 0);
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WARN(!wdt_base, "failed to map watchdog base address");
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}
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static void __init sunxi_dt_init(void)
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{
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sunxi_setup_restart();
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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}
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static const char * const sunxi_board_dt_compat[] = {
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"allwinner,sun4i-a10",
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"allwinner,sun5i-a10s",
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"allwinner,sun5i-a13",
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NULL,
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};
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DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)")
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.init_machine = sunxi_dt_init,
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.dt_compat = sunxi_board_dt_compat,
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.restart = sun4i_restart,
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MACHINE_END
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static const char * const sun6i_board_dt_compat[] = {
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"allwinner,sun6i-a31",
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NULL,
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};
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extern void __init sun6i_reset_init(void);
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static void __init sun6i_timer_init(void)
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{
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of_clk_init(NULL);
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if (IS_ENABLED(CONFIG_RESET_CONTROLLER))
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sun6i_reset_init();
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clocksource_of_init();
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}
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DT_MACHINE_START(SUN6I_DT, "Allwinner sun6i (A31) Family")
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.init_time = sun6i_timer_init,
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.dt_compat = sun6i_board_dt_compat,
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MACHINE_END
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static const char * const sun7i_board_dt_compat[] = {
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"allwinner,sun7i-a20",
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NULL,
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};
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DT_MACHINE_START(SUN7I_DT, "Allwinner sun7i (A20) Family")
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.init_machine = sunxi_dt_init,
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.dt_compat = sun7i_board_dt_compat,
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.restart = sun4i_restart,
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MACHINE_END
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