forked from Minki/linux
df7fba6647
The sm_lock spinlock is taken in the process context by mlx4_ib_modify_device, and in the interrupt context by update_sm_ah, so we need to take that spinlock with irqsave, and release it with irqrestore. Lockdeps reports this as follows: [ INFO: inconsistent lock state ] 3.5.0+ #20 Not tainted inconsistent {HARDIRQ-ON-W} -> {IN-HARDIRQ-W} usage. swapper/0/0 [HC1[1]:SC0[0]:HE0:SE1] takes: (&(&ibdev->sm_lock)->rlock){?.+...}, at: [<ffffffffa028af1d>] update_sm_ah+0xad/0x100 [mlx4_ib] {HARDIRQ-ON-W} state was registered at: [<ffffffff810b84a0>] mark_irqflags+0x120/0x190 [<ffffffff810b9ce7>] __lock_acquire+0x307/0x4c0 [<ffffffff810b9f51>] lock_acquire+0xb1/0x150 [<ffffffff815523b1>] _raw_spin_lock+0x41/0x50 [<ffffffffa028d563>] mlx4_ib_modify_device+0x63/0x240 [mlx4_ib] [<ffffffffa026d1fc>] ib_modify_device+0x1c/0x20 [ib_core] [<ffffffffa026c353>] set_node_desc+0x83/0xc0 [ib_core] [<ffffffff8136a150>] dev_attr_store+0x20/0x30 [<ffffffff81201fd6>] sysfs_write_file+0xe6/0x170 [<ffffffff8118da38>] vfs_write+0xc8/0x190 [<ffffffff8118dc01>] sys_write+0x51/0x90 [<ffffffff8155b869>] system_call_fastpath+0x16/0x1b ... *** DEADLOCK *** 1 lock held by swapper/0/0: stack backtrace: Pid: 0, comm: swapper/0 Not tainted 3.5.0+ #20 Call Trace: <IRQ> [<ffffffff810b7bea>] print_usage_bug+0x18a/0x190 [<ffffffff810b7370>] ? print_irq_inversion_bug+0x210/0x210 [<ffffffff810b7fb2>] mark_lock_irq+0xf2/0x280 [<ffffffff810b8290>] mark_lock+0x150/0x240 [<ffffffff810b84ef>] mark_irqflags+0x16f/0x190 [<ffffffff810b9ce7>] __lock_acquire+0x307/0x4c0 [<ffffffffa028af1d>] ? update_sm_ah+0xad/0x100 [mlx4_ib] [<ffffffff810b9f51>] lock_acquire+0xb1/0x150 [<ffffffffa028af1d>] ? update_sm_ah+0xad/0x100 [mlx4_ib] [<ffffffff815523b1>] _raw_spin_lock+0x41/0x50 [<ffffffffa028af1d>] ? update_sm_ah+0xad/0x100 [mlx4_ib] [<ffffffffa026b2fa>] ? ib_create_ah+0x1a/0x40 [ib_core] [<ffffffffa028af1d>] update_sm_ah+0xad/0x100 [mlx4_ib] [<ffffffff810c27c3>] ? is_module_address+0x23/0x30 [<ffffffffa028b05b>] handle_port_mgmt_change_event+0xeb/0x150 [mlx4_ib] [<ffffffffa028c177>] mlx4_ib_event+0x117/0x160 [mlx4_ib] [<ffffffff81552501>] ? _raw_spin_lock_irqsave+0x61/0x70 [<ffffffffa022718c>] mlx4_dispatch_event+0x6c/0x90 [mlx4_core] [<ffffffffa0221b40>] mlx4_eq_int+0x500/0x950 [mlx4_core] Reported by: Or Gerlitz <ogerlitz@mellanox.com> Tested-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il> Signed-off-by: Roland Dreier <roland@purestorage.com>
519 lines
15 KiB
C
519 lines
15 KiB
C
/*
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* Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include <rdma/ib_mad.h>
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#include <rdma/ib_smi.h>
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#include <linux/mlx4/cmd.h>
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#include <linux/gfp.h>
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#include <rdma/ib_pma.h>
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#include "mlx4_ib.h"
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enum {
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MLX4_IB_VENDOR_CLASS1 = 0x9,
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MLX4_IB_VENDOR_CLASS2 = 0xa
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};
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int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int ignore_mkey, int ignore_bkey,
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int port, struct ib_wc *in_wc, struct ib_grh *in_grh,
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void *in_mad, void *response_mad)
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{
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struct mlx4_cmd_mailbox *inmailbox, *outmailbox;
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void *inbox;
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int err;
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u32 in_modifier = port;
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u8 op_modifier = 0;
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inmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
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if (IS_ERR(inmailbox))
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return PTR_ERR(inmailbox);
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inbox = inmailbox->buf;
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outmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
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if (IS_ERR(outmailbox)) {
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mlx4_free_cmd_mailbox(dev->dev, inmailbox);
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return PTR_ERR(outmailbox);
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}
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memcpy(inbox, in_mad, 256);
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/*
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* Key check traps can't be generated unless we have in_wc to
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* tell us where to send the trap.
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*/
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if (ignore_mkey || !in_wc)
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op_modifier |= 0x1;
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if (ignore_bkey || !in_wc)
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op_modifier |= 0x2;
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if (in_wc) {
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struct {
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__be32 my_qpn;
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u32 reserved1;
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__be32 rqpn;
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u8 sl;
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u8 g_path;
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u16 reserved2[2];
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__be16 pkey;
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u32 reserved3[11];
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u8 grh[40];
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} *ext_info;
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memset(inbox + 256, 0, 256);
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ext_info = inbox + 256;
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ext_info->my_qpn = cpu_to_be32(in_wc->qp->qp_num);
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ext_info->rqpn = cpu_to_be32(in_wc->src_qp);
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ext_info->sl = in_wc->sl << 4;
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ext_info->g_path = in_wc->dlid_path_bits |
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(in_wc->wc_flags & IB_WC_GRH ? 0x80 : 0);
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ext_info->pkey = cpu_to_be16(in_wc->pkey_index);
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if (in_grh)
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memcpy(ext_info->grh, in_grh, 40);
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op_modifier |= 0x4;
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in_modifier |= in_wc->slid << 16;
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}
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err = mlx4_cmd_box(dev->dev, inmailbox->dma, outmailbox->dma,
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in_modifier, op_modifier,
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MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C,
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MLX4_CMD_NATIVE);
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if (!err)
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memcpy(response_mad, outmailbox->buf, 256);
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mlx4_free_cmd_mailbox(dev->dev, inmailbox);
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mlx4_free_cmd_mailbox(dev->dev, outmailbox);
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return err;
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}
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static void update_sm_ah(struct mlx4_ib_dev *dev, u8 port_num, u16 lid, u8 sl)
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{
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struct ib_ah *new_ah;
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struct ib_ah_attr ah_attr;
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unsigned long flags;
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if (!dev->send_agent[port_num - 1][0])
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return;
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memset(&ah_attr, 0, sizeof ah_attr);
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ah_attr.dlid = lid;
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ah_attr.sl = sl;
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ah_attr.port_num = port_num;
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new_ah = ib_create_ah(dev->send_agent[port_num - 1][0]->qp->pd,
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&ah_attr);
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if (IS_ERR(new_ah))
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return;
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spin_lock_irqsave(&dev->sm_lock, flags);
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if (dev->sm_ah[port_num - 1])
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ib_destroy_ah(dev->sm_ah[port_num - 1]);
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dev->sm_ah[port_num - 1] = new_ah;
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spin_unlock_irqrestore(&dev->sm_lock, flags);
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}
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/*
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* Snoop SM MADs for port info, GUID info, and P_Key table sets, so we can
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* synthesize LID change, Client-Rereg, GID change, and P_Key change events.
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*/
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static void smp_snoop(struct ib_device *ibdev, u8 port_num, struct ib_mad *mad,
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u16 prev_lid)
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{
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struct ib_port_info *pinfo;
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u16 lid;
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struct mlx4_ib_dev *dev = to_mdev(ibdev);
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if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
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mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
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mad->mad_hdr.method == IB_MGMT_METHOD_SET)
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switch (mad->mad_hdr.attr_id) {
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case IB_SMP_ATTR_PORT_INFO:
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pinfo = (struct ib_port_info *) ((struct ib_smp *) mad)->data;
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lid = be16_to_cpu(pinfo->lid);
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update_sm_ah(dev, port_num,
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be16_to_cpu(pinfo->sm_lid),
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pinfo->neighbormtu_mastersmsl & 0xf);
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if (pinfo->clientrereg_resv_subnetto & 0x80)
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mlx4_ib_dispatch_event(dev, port_num,
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IB_EVENT_CLIENT_REREGISTER);
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if (prev_lid != lid)
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mlx4_ib_dispatch_event(dev, port_num,
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IB_EVENT_LID_CHANGE);
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break;
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case IB_SMP_ATTR_PKEY_TABLE:
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mlx4_ib_dispatch_event(dev, port_num,
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IB_EVENT_PKEY_CHANGE);
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break;
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case IB_SMP_ATTR_GUID_INFO:
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/* paravirtualized master's guid is guid 0 -- does not change */
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if (!mlx4_is_master(dev->dev))
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mlx4_ib_dispatch_event(dev, port_num,
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IB_EVENT_GID_CHANGE);
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break;
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default:
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break;
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}
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}
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static void node_desc_override(struct ib_device *dev,
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struct ib_mad *mad)
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{
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unsigned long flags;
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if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
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mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
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mad->mad_hdr.method == IB_MGMT_METHOD_GET_RESP &&
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mad->mad_hdr.attr_id == IB_SMP_ATTR_NODE_DESC) {
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spin_lock_irqsave(&to_mdev(dev)->sm_lock, flags);
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memcpy(((struct ib_smp *) mad)->data, dev->node_desc, 64);
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spin_unlock_irqrestore(&to_mdev(dev)->sm_lock, flags);
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}
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}
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static void forward_trap(struct mlx4_ib_dev *dev, u8 port_num, struct ib_mad *mad)
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{
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int qpn = mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED;
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struct ib_mad_send_buf *send_buf;
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struct ib_mad_agent *agent = dev->send_agent[port_num - 1][qpn];
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int ret;
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unsigned long flags;
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if (agent) {
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send_buf = ib_create_send_mad(agent, qpn, 0, 0, IB_MGMT_MAD_HDR,
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IB_MGMT_MAD_DATA, GFP_ATOMIC);
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if (IS_ERR(send_buf))
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return;
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/*
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* We rely here on the fact that MLX QPs don't use the
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* address handle after the send is posted (this is
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* wrong following the IB spec strictly, but we know
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* it's OK for our devices).
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*/
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spin_lock_irqsave(&dev->sm_lock, flags);
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memcpy(send_buf->mad, mad, sizeof *mad);
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if ((send_buf->ah = dev->sm_ah[port_num - 1]))
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ret = ib_post_send_mad(send_buf, NULL);
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else
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ret = -EINVAL;
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spin_unlock_irqrestore(&dev->sm_lock, flags);
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if (ret)
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ib_free_send_mad(send_buf);
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}
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}
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static int ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
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struct ib_wc *in_wc, struct ib_grh *in_grh,
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struct ib_mad *in_mad, struct ib_mad *out_mad)
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{
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u16 slid, prev_lid = 0;
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int err;
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struct ib_port_attr pattr;
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if (in_wc && in_wc->qp->qp_num) {
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pr_debug("received MAD: slid:%d sqpn:%d "
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"dlid_bits:%d dqpn:%d wc_flags:0x%x, cls %x, mtd %x, atr %x\n",
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in_wc->slid, in_wc->src_qp,
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in_wc->dlid_path_bits,
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in_wc->qp->qp_num,
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in_wc->wc_flags,
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in_mad->mad_hdr.mgmt_class, in_mad->mad_hdr.method,
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be16_to_cpu(in_mad->mad_hdr.attr_id));
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if (in_wc->wc_flags & IB_WC_GRH) {
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pr_debug("sgid_hi:0x%016llx sgid_lo:0x%016llx\n",
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be64_to_cpu(in_grh->sgid.global.subnet_prefix),
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be64_to_cpu(in_grh->sgid.global.interface_id));
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pr_debug("dgid_hi:0x%016llx dgid_lo:0x%016llx\n",
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be64_to_cpu(in_grh->dgid.global.subnet_prefix),
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be64_to_cpu(in_grh->dgid.global.interface_id));
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}
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}
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slid = in_wc ? in_wc->slid : be16_to_cpu(IB_LID_PERMISSIVE);
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if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP && slid == 0) {
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forward_trap(to_mdev(ibdev), port_num, in_mad);
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return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
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}
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if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
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in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
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if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET &&
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in_mad->mad_hdr.method != IB_MGMT_METHOD_SET &&
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in_mad->mad_hdr.method != IB_MGMT_METHOD_TRAP_REPRESS)
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return IB_MAD_RESULT_SUCCESS;
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/*
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* Don't process SMInfo queries -- the SMA can't handle them.
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*/
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if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO)
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return IB_MAD_RESULT_SUCCESS;
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} else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT ||
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in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS1 ||
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in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS2 ||
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in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_CONG_MGMT) {
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if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET &&
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in_mad->mad_hdr.method != IB_MGMT_METHOD_SET)
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return IB_MAD_RESULT_SUCCESS;
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} else
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return IB_MAD_RESULT_SUCCESS;
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if ((in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
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in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
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in_mad->mad_hdr.method == IB_MGMT_METHOD_SET &&
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in_mad->mad_hdr.attr_id == IB_SMP_ATTR_PORT_INFO &&
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!ib_query_port(ibdev, port_num, &pattr))
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prev_lid = pattr.lid;
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err = mlx4_MAD_IFC(to_mdev(ibdev),
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mad_flags & IB_MAD_IGNORE_MKEY,
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mad_flags & IB_MAD_IGNORE_BKEY,
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port_num, in_wc, in_grh, in_mad, out_mad);
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if (err)
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return IB_MAD_RESULT_FAILURE;
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if (!out_mad->mad_hdr.status) {
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if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV))
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smp_snoop(ibdev, port_num, in_mad, prev_lid);
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node_desc_override(ibdev, out_mad);
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}
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/* set return bit in status of directed route responses */
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if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
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out_mad->mad_hdr.status |= cpu_to_be16(1 << 15);
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if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP_REPRESS)
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/* no response for trap repress */
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return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
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return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
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}
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static void edit_counter(struct mlx4_counter *cnt,
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struct ib_pma_portcounters *pma_cnt)
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{
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pma_cnt->port_xmit_data = cpu_to_be32((be64_to_cpu(cnt->tx_bytes)>>2));
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pma_cnt->port_rcv_data = cpu_to_be32((be64_to_cpu(cnt->rx_bytes)>>2));
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pma_cnt->port_xmit_packets = cpu_to_be32(be64_to_cpu(cnt->tx_frames));
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pma_cnt->port_rcv_packets = cpu_to_be32(be64_to_cpu(cnt->rx_frames));
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}
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static int iboe_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
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struct ib_wc *in_wc, struct ib_grh *in_grh,
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struct ib_mad *in_mad, struct ib_mad *out_mad)
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{
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struct mlx4_cmd_mailbox *mailbox;
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struct mlx4_ib_dev *dev = to_mdev(ibdev);
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int err;
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u32 inmod = dev->counters[port_num - 1] & 0xffff;
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u8 mode;
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if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_PERF_MGMT)
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return -EINVAL;
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mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
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if (IS_ERR(mailbox))
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return IB_MAD_RESULT_FAILURE;
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err = mlx4_cmd_box(dev->dev, 0, mailbox->dma, inmod, 0,
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MLX4_CMD_QUERY_IF_STAT, MLX4_CMD_TIME_CLASS_C,
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MLX4_CMD_WRAPPED);
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if (err)
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err = IB_MAD_RESULT_FAILURE;
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else {
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memset(out_mad->data, 0, sizeof out_mad->data);
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mode = ((struct mlx4_counter *)mailbox->buf)->counter_mode;
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switch (mode & 0xf) {
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case 0:
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edit_counter(mailbox->buf,
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(void *)(out_mad->data + 40));
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err = IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
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break;
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default:
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err = IB_MAD_RESULT_FAILURE;
|
|
}
|
|
}
|
|
|
|
mlx4_free_cmd_mailbox(dev->dev, mailbox);
|
|
|
|
return err;
|
|
}
|
|
|
|
int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
|
|
struct ib_wc *in_wc, struct ib_grh *in_grh,
|
|
struct ib_mad *in_mad, struct ib_mad *out_mad)
|
|
{
|
|
switch (rdma_port_get_link_layer(ibdev, port_num)) {
|
|
case IB_LINK_LAYER_INFINIBAND:
|
|
return ib_process_mad(ibdev, mad_flags, port_num, in_wc,
|
|
in_grh, in_mad, out_mad);
|
|
case IB_LINK_LAYER_ETHERNET:
|
|
return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
|
|
in_grh, in_mad, out_mad);
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
}
|
|
|
|
static void send_handler(struct ib_mad_agent *agent,
|
|
struct ib_mad_send_wc *mad_send_wc)
|
|
{
|
|
ib_free_send_mad(mad_send_wc->send_buf);
|
|
}
|
|
|
|
int mlx4_ib_mad_init(struct mlx4_ib_dev *dev)
|
|
{
|
|
struct ib_mad_agent *agent;
|
|
int p, q;
|
|
int ret;
|
|
enum rdma_link_layer ll;
|
|
|
|
for (p = 0; p < dev->num_ports; ++p) {
|
|
ll = rdma_port_get_link_layer(&dev->ib_dev, p + 1);
|
|
for (q = 0; q <= 1; ++q) {
|
|
if (ll == IB_LINK_LAYER_INFINIBAND) {
|
|
agent = ib_register_mad_agent(&dev->ib_dev, p + 1,
|
|
q ? IB_QPT_GSI : IB_QPT_SMI,
|
|
NULL, 0, send_handler,
|
|
NULL, NULL);
|
|
if (IS_ERR(agent)) {
|
|
ret = PTR_ERR(agent);
|
|
goto err;
|
|
}
|
|
dev->send_agent[p][q] = agent;
|
|
} else
|
|
dev->send_agent[p][q] = NULL;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
|
|
err:
|
|
for (p = 0; p < dev->num_ports; ++p)
|
|
for (q = 0; q <= 1; ++q)
|
|
if (dev->send_agent[p][q])
|
|
ib_unregister_mad_agent(dev->send_agent[p][q]);
|
|
|
|
return ret;
|
|
}
|
|
|
|
void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev)
|
|
{
|
|
struct ib_mad_agent *agent;
|
|
int p, q;
|
|
|
|
for (p = 0; p < dev->num_ports; ++p) {
|
|
for (q = 0; q <= 1; ++q) {
|
|
agent = dev->send_agent[p][q];
|
|
if (agent) {
|
|
dev->send_agent[p][q] = NULL;
|
|
ib_unregister_mad_agent(agent);
|
|
}
|
|
}
|
|
|
|
if (dev->sm_ah[p])
|
|
ib_destroy_ah(dev->sm_ah[p]);
|
|
}
|
|
}
|
|
|
|
void handle_port_mgmt_change_event(struct work_struct *work)
|
|
{
|
|
struct ib_event_work *ew = container_of(work, struct ib_event_work, work);
|
|
struct mlx4_ib_dev *dev = ew->ib_dev;
|
|
struct mlx4_eqe *eqe = &(ew->ib_eqe);
|
|
u8 port = eqe->event.port_mgmt_change.port;
|
|
u32 changed_attr;
|
|
|
|
switch (eqe->subtype) {
|
|
case MLX4_DEV_PMC_SUBTYPE_PORT_INFO:
|
|
changed_attr = be32_to_cpu(eqe->event.port_mgmt_change.params.port_info.changed_attr);
|
|
|
|
/* Update the SM ah - This should be done before handling
|
|
the other changed attributes so that MADs can be sent to the SM */
|
|
if (changed_attr & MSTR_SM_CHANGE_MASK) {
|
|
u16 lid = be16_to_cpu(eqe->event.port_mgmt_change.params.port_info.mstr_sm_lid);
|
|
u8 sl = eqe->event.port_mgmt_change.params.port_info.mstr_sm_sl & 0xf;
|
|
update_sm_ah(dev, port, lid, sl);
|
|
}
|
|
|
|
/* Check if it is a lid change event */
|
|
if (changed_attr & MLX4_EQ_PORT_INFO_LID_CHANGE_MASK)
|
|
mlx4_ib_dispatch_event(dev, port, IB_EVENT_LID_CHANGE);
|
|
|
|
/* Generate GUID changed event */
|
|
if (changed_attr & MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK)
|
|
mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
|
|
|
|
if (changed_attr & MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK)
|
|
mlx4_ib_dispatch_event(dev, port,
|
|
IB_EVENT_CLIENT_REREGISTER);
|
|
break;
|
|
|
|
case MLX4_DEV_PMC_SUBTYPE_PKEY_TABLE:
|
|
mlx4_ib_dispatch_event(dev, port, IB_EVENT_PKEY_CHANGE);
|
|
break;
|
|
case MLX4_DEV_PMC_SUBTYPE_GUID_INFO:
|
|
/* paravirtualized master's guid is guid 0 -- does not change */
|
|
if (!mlx4_is_master(dev->dev))
|
|
mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
|
|
break;
|
|
default:
|
|
pr_warn("Unsupported subtype 0x%x for "
|
|
"Port Management Change event\n", eqe->subtype);
|
|
}
|
|
|
|
kfree(ew);
|
|
}
|
|
|
|
void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
|
|
enum ib_event_type type)
|
|
{
|
|
struct ib_event event;
|
|
|
|
event.device = &dev->ib_dev;
|
|
event.element.port_num = port_num;
|
|
event.event = type;
|
|
|
|
ib_dispatch_event(&event);
|
|
}
|