forked from Minki/linux
df791b3ebf
Move all clksel-related clock functions from mach-omap2/clock.c to mach-omap2/clkt_clksel.c. This is intended to make the clock code easier to understand, since all of the functions needed to manage clksel clocks are now located in their own file, rather than being mixed with other, unrelated functions. Clock debugging is also now more finely-grained, since the DEBUG macro can now be defined for clksel clocks alon. This should reduce unnecessary console noise when debugging. Also, if at some future point the mach-omap2/ directory is split into OMAP2/3/4 variants, this clkt file can be moved to the plat-omap/ directory to be shared. Thanks to Alexander Shishkin <virtuoso@slind.org> for his comments to improve the patch description. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Alexander Shishkin <virtuoso@slind.org>
350 lines
9.3 KiB
C
350 lines
9.3 KiB
C
/*
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* linux/arch/arm/mach-omap2/clock.c
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*
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* Copyright (C) 2005-2008 Texas Instruments, Inc.
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* Copyright (C) 2004-2008 Nokia Corporation
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*
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* Contacts:
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* Richard Woodruff <r-woodruff2@ti.com>
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* Paul Walmsley
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#undef DEBUG
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/device.h>
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#include <linux/list.h>
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#include <linux/errno.h>
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#include <linux/delay.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/bitops.h>
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#include <plat/clock.h>
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#include <plat/clockdomain.h>
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#include <plat/cpu.h>
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#include <plat/prcm.h>
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#include "clock.h"
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#include "prm.h"
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#include "prm-regbits-24xx.h"
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#include "cm.h"
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#include "cm-regbits-24xx.h"
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#include "cm-regbits-34xx.h"
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u8 cpu_mask;
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/*-------------------------------------------------------------------------
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* OMAP2/3/4 specific clock functions
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*-------------------------------------------------------------------------*/
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/**
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* omap2xxx_clk_commit - commit clock parent/rate changes in hardware
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* @clk: struct clk *
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*
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* If @clk has the DELAYED_APP flag set, meaning that parent/rate changes
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* don't take effect until the VALID_CONFIG bit is written, write the
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* VALID_CONFIG bit and wait for the write to complete. No return value.
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*/
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void omap2xxx_clk_commit(struct clk *clk)
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{
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if (!cpu_is_omap24xx())
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return;
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if (!(clk->flags & DELAYED_APP))
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return;
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prm_write_mod_reg(OMAP24XX_VALID_CONFIG, OMAP24XX_GR_MOD,
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OMAP2_PRCM_CLKCFG_CTRL_OFFSET);
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/* OCP barrier */
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prm_read_mod_reg(OMAP24XX_GR_MOD, OMAP2_PRCM_CLKCFG_CTRL_OFFSET);
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}
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/**
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* omap2_init_clk_clkdm - look up a clockdomain name, store pointer in clk
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* @clk: OMAP clock struct ptr to use
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*
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* Convert a clockdomain name stored in a struct clk 'clk' into a
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* clockdomain pointer, and save it into the struct clk. Intended to be
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* called during clk_register(). No return value.
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*/
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void omap2_init_clk_clkdm(struct clk *clk)
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{
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struct clockdomain *clkdm;
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if (!clk->clkdm_name)
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return;
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clkdm = clkdm_lookup(clk->clkdm_name);
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if (clkdm) {
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pr_debug("clock: associated clk %s to clkdm %s\n",
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clk->name, clk->clkdm_name);
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clk->clkdm = clkdm;
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} else {
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pr_debug("clock: could not associate clk %s to "
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"clkdm %s\n", clk->name, clk->clkdm_name);
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}
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}
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/**
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* omap2_clk_dflt_find_companion - find companion clock to @clk
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* @clk: struct clk * to find the companion clock of
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* @other_reg: void __iomem ** to return the companion clock CM_*CLKEN va in
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* @other_bit: u8 ** to return the companion clock bit shift in
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*
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* Note: We don't need special code here for INVERT_ENABLE for the
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* time being since INVERT_ENABLE only applies to clocks enabled by
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* CM_CLKEN_PLL
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*
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* Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes it's
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* just a matter of XORing the bits.
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*
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* Some clocks don't have companion clocks. For example, modules with
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* only an interface clock (such as MAILBOXES) don't have a companion
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* clock. Right now, this code relies on the hardware exporting a bit
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* in the correct companion register that indicates that the
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* nonexistent 'companion clock' is active. Future patches will
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* associate this type of code with per-module data structures to
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* avoid this issue, and remove the casts. No return value.
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*/
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void omap2_clk_dflt_find_companion(struct clk *clk, void __iomem **other_reg,
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u8 *other_bit)
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{
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u32 r;
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/*
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* Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes
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* it's just a matter of XORing the bits.
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*/
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r = ((__force u32)clk->enable_reg ^ (CM_FCLKEN ^ CM_ICLKEN));
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*other_reg = (__force void __iomem *)r;
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*other_bit = clk->enable_bit;
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}
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/**
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* omap2_clk_dflt_find_idlest - find CM_IDLEST reg va, bit shift for @clk
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* @clk: struct clk * to find IDLEST info for
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* @idlest_reg: void __iomem ** to return the CM_IDLEST va in
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* @idlest_bit: u8 ** to return the CM_IDLEST bit shift in
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*
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* Return the CM_IDLEST register address and bit shift corresponding
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* to the module that "owns" this clock. This default code assumes
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* that the CM_IDLEST bit shift is the CM_*CLKEN bit shift, and that
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* the IDLEST register address ID corresponds to the CM_*CLKEN
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* register address ID (e.g., that CM_FCLKEN2 corresponds to
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* CM_IDLEST2). This is not true for all modules. No return value.
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*/
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void omap2_clk_dflt_find_idlest(struct clk *clk, void __iomem **idlest_reg,
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u8 *idlest_bit)
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{
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u32 r;
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r = (((__force u32)clk->enable_reg & ~0xf0) | 0x20);
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*idlest_reg = (__force void __iomem *)r;
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*idlest_bit = clk->enable_bit;
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}
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/**
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* omap2_module_wait_ready - wait for an OMAP module to leave IDLE
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* @clk: struct clk * belonging to the module
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*
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* If the necessary clocks for the OMAP hardware IP block that
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* corresponds to clock @clk are enabled, then wait for the module to
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* indicate readiness (i.e., to leave IDLE). This code does not
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* belong in the clock code and will be moved in the medium term to
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* module-dependent code. No return value.
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*/
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static void omap2_module_wait_ready(struct clk *clk)
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{
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void __iomem *companion_reg, *idlest_reg;
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u8 other_bit, idlest_bit;
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/* Not all modules have multiple clocks that their IDLEST depends on */
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if (clk->ops->find_companion) {
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clk->ops->find_companion(clk, &companion_reg, &other_bit);
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if (!(__raw_readl(companion_reg) & (1 << other_bit)))
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return;
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}
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clk->ops->find_idlest(clk, &idlest_reg, &idlest_bit);
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omap2_cm_wait_idlest(idlest_reg, (1 << idlest_bit), clk->name);
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}
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int omap2_dflt_clk_enable(struct clk *clk)
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{
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u32 v;
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if (unlikely(clk->enable_reg == NULL)) {
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pr_err("clock.c: Enable for %s without enable code\n",
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clk->name);
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return 0; /* REVISIT: -EINVAL */
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}
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v = __raw_readl(clk->enable_reg);
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if (clk->flags & INVERT_ENABLE)
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v &= ~(1 << clk->enable_bit);
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else
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v |= (1 << clk->enable_bit);
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__raw_writel(v, clk->enable_reg);
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v = __raw_readl(clk->enable_reg); /* OCP barrier */
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if (clk->ops->find_idlest)
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omap2_module_wait_ready(clk);
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return 0;
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}
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void omap2_dflt_clk_disable(struct clk *clk)
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{
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u32 v;
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if (!clk->enable_reg) {
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/*
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* 'Independent' here refers to a clock which is not
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* controlled by its parent.
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*/
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printk(KERN_ERR "clock: clk_disable called on independent "
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"clock %s which has no enable_reg\n", clk->name);
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return;
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}
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v = __raw_readl(clk->enable_reg);
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if (clk->flags & INVERT_ENABLE)
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v |= (1 << clk->enable_bit);
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else
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v &= ~(1 << clk->enable_bit);
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__raw_writel(v, clk->enable_reg);
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/* No OCP barrier needed here since it is a disable operation */
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}
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const struct clkops clkops_omap2_dflt_wait = {
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.enable = omap2_dflt_clk_enable,
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.disable = omap2_dflt_clk_disable,
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.find_companion = omap2_clk_dflt_find_companion,
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.find_idlest = omap2_clk_dflt_find_idlest,
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};
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const struct clkops clkops_omap2_dflt = {
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.enable = omap2_dflt_clk_enable,
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.disable = omap2_dflt_clk_disable,
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};
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/* Enables clock without considering parent dependencies or use count
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* REVISIT: Maybe change this to use clk->enable like on omap1?
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*/
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static int _omap2_clk_enable(struct clk *clk)
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{
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return clk->ops->enable(clk);
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}
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/* Disables clock without considering parent dependencies or use count */
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static void _omap2_clk_disable(struct clk *clk)
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{
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clk->ops->disable(clk);
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}
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void omap2_clk_disable(struct clk *clk)
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{
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if (clk->usecount > 0 && !(--clk->usecount)) {
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_omap2_clk_disable(clk);
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if (clk->parent)
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omap2_clk_disable(clk->parent);
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if (clk->clkdm)
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omap2_clkdm_clk_disable(clk->clkdm, clk);
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}
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}
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int omap2_clk_enable(struct clk *clk)
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{
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int ret = 0;
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if (clk->usecount++ == 0) {
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if (clk->clkdm)
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omap2_clkdm_clk_enable(clk->clkdm, clk);
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if (clk->parent) {
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ret = omap2_clk_enable(clk->parent);
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if (ret)
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goto err;
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}
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ret = _omap2_clk_enable(clk);
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if (ret) {
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if (clk->parent)
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omap2_clk_disable(clk->parent);
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goto err;
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}
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}
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return ret;
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err:
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if (clk->clkdm)
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omap2_clkdm_clk_disable(clk->clkdm, clk);
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clk->usecount--;
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return ret;
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}
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/* Set the clock rate for a clock source */
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int omap2_clk_set_rate(struct clk *clk, unsigned long rate)
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{
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int ret = -EINVAL;
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pr_debug("clock: set_rate for clock %s to rate %ld\n", clk->name, rate);
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/* CONFIG_PARTICIPANT clocks are changed only in sets via the
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rate table mechanism, driven by mpu_speed */
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if (clk->flags & CONFIG_PARTICIPANT)
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return -EINVAL;
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/* dpll_ck, core_ck, virt_prcm_set; plus all clksel clocks */
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if (clk->set_rate)
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ret = clk->set_rate(clk, rate);
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return ret;
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}
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int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
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{
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if (clk->flags & CONFIG_PARTICIPANT)
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return -EINVAL;
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if (!clk->clksel)
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return -EINVAL;
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return omap2_clksel_set_parent(clk, new_parent);
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}
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/*-------------------------------------------------------------------------
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* Omap2 clock reset and init functions
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*-------------------------------------------------------------------------*/
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#ifdef CONFIG_OMAP_RESET_CLOCKS
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void omap2_clk_disable_unused(struct clk *clk)
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{
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u32 regval32, v;
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v = (clk->flags & INVERT_ENABLE) ? (1 << clk->enable_bit) : 0;
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regval32 = __raw_readl(clk->enable_reg);
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if ((regval32 & (1 << clk->enable_bit)) == v)
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return;
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printk(KERN_DEBUG "Disabling unused clock \"%s\"\n", clk->name);
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if (cpu_is_omap34xx()) {
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omap2_clk_enable(clk);
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omap2_clk_disable(clk);
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} else
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_omap2_clk_disable(clk);
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if (clk->clkdm != NULL)
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pwrdm_clkdm_state_switch(clk->clkdm);
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}
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#endif
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