forked from Minki/linux
8062b4aafc
Support for the new H5 SoC and the PRCM block found in a number of SoCs as well, plus the usual chunk of fixes and minor enhancements. -----BEGIN PGP SIGNATURE----- iQIcBAABCAAGBQJY5feFAAoJEBx+YmzsjxAgzicP/2zx3xYRy5C69wI5IRxAMDjg 3AGgZgVXH/ir9CHVW7oGhBo9VdgbMdTZAJCA6WKBVjpjSsRkEVeEeRMTKAPbBBll u5bFpQ2hX4WnGFlILAfXLtJJ39pEPZnHUN+ew3umR7xXMm76o7vB8Z59fd9qkgpP wXwwZPDywtLusawxDjci0Wrzek8MHkFA6WwXnlnp82CbG+tLOe+o/x9kv125x9fT td2POgaoG2FEBL1GyfqY0uzmNKs8oHwgbWmepsu5xFmmLYS4cwVHHIMAm3iOEmF+ tPZfeYxYVDY3cDfPhyj7/in3ej5SM63ZG6YSZjd2z/rXhGrcCNCmhFEwk9ie81oT uHQ6B7K4hAtV1zJ7wZZJD/vqZewOaTcb/V9S7D1bGsBLcBrswOp7yaf2ECnhSQu0 C20Vp9xFdmSTReGIpD6+HCVLYSU0DHOVx0D/+dPOTtrfJR98xiEvUPekuo9yRmuc MIBFzRJ83x9Ee5PS2jBju2V7VaGD08Q6R3JLDkCgUTaBTZq/jlNGc/9DD6llFM/E idQ6j9dJnSzU6C4QVClIxBQHJu4kGNUUeWAXqxBTEh7jUg5bnKjUXox0W44RzqPP j/ZWB60xLD/FdbaGQdxU72uFpok9Uc2fySvQqAwePe5F2j27IIMOKu/CpFmefc17 Ww+4lw2nbR3dypCxt6C7 =V49g -----END PGP SIGNATURE----- Merge tag 'sunxi-clk-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-next Pull Allwinner clock patches for 4.12 from Maxime Ripard: Support for the new H5 SoC and the PRCM block found in a number of SoCs as well, plus the usual chunk of fixes and minor enhancements. * tag 'sunxi-clk-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: clk: sunxi-ng: Display index when clock registration fails clk: sunxi-ng: a33: Add offset and minimum value for DDR1 PLL N factor clk: sunxi-ng: a80: Remodel CPU cluster PLLs as N-type multiplier clocks clk: sunxi-ng: mult: Support PLL lock detection clk: sunxi-ng: add support for PRCM CCUs dt-bindings: update device tree binding for Allwinner PRCM CCUs clk: sunxi-ng: sun5i: Fix mux width for csi clock clk: sunxi-ng: tighten SoC deps on explicit AllWinner SoCs clk: sunxi-ng: add Allwinner H5 CCU support for H3 CCU driver clk: sunxi-ng: gate: Support common pre-dividers
162 lines
3.2 KiB
Plaintext
162 lines
3.2 KiB
Plaintext
config SUNXI_CCU
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bool "Clock support for Allwinner SoCs"
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depends on ARCH_SUNXI || COMPILE_TEST
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select RESET_CONTROLLER
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default ARCH_SUNXI
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if SUNXI_CCU
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# Base clock types
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config SUNXI_CCU_DIV
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bool
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select SUNXI_CCU_MUX
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config SUNXI_CCU_FRAC
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bool
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config SUNXI_CCU_GATE
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bool
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config SUNXI_CCU_MUX
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bool
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config SUNXI_CCU_MULT
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bool
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select SUNXI_CCU_MUX
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config SUNXI_CCU_PHASE
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bool
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# Multi-factor clocks
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config SUNXI_CCU_NK
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bool
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select SUNXI_CCU_GATE
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config SUNXI_CCU_NKM
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bool
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select SUNXI_CCU_GATE
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config SUNXI_CCU_NKMP
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bool
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select SUNXI_CCU_GATE
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config SUNXI_CCU_NM
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bool
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select SUNXI_CCU_FRAC
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select SUNXI_CCU_GATE
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config SUNXI_CCU_MP
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bool
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select SUNXI_CCU_GATE
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select SUNXI_CCU_MUX
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# SoC Drivers
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config SUN50I_A64_CCU
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bool "Support for the Allwinner A64 CCU"
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select SUNXI_CCU_DIV
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select SUNXI_CCU_NK
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select SUNXI_CCU_NKM
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select SUNXI_CCU_NKMP
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select SUNXI_CCU_NM
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select SUNXI_CCU_MP
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select SUNXI_CCU_PHASE
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default ARM64 && ARCH_SUNXI
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depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST
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config SUN5I_CCU
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bool "Support for the Allwinner sun5i family CCM"
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select SUNXI_CCU_DIV
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select SUNXI_CCU_MULT
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select SUNXI_CCU_NK
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select SUNXI_CCU_NKM
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select SUNXI_CCU_NM
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select SUNXI_CCU_MP
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select SUNXI_CCU_PHASE
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default MACH_SUN5I
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depends on MACH_SUN5I || COMPILE_TEST
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config SUN6I_A31_CCU
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bool "Support for the Allwinner A31/A31s CCU"
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select SUNXI_CCU_DIV
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select SUNXI_CCU_NK
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select SUNXI_CCU_NKM
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select SUNXI_CCU_NKMP
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select SUNXI_CCU_NM
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select SUNXI_CCU_MP
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select SUNXI_CCU_PHASE
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default MACH_SUN6I
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depends on MACH_SUN6I || COMPILE_TEST
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config SUN8I_A23_CCU
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bool "Support for the Allwinner A23 CCU"
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select SUNXI_CCU_DIV
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select SUNXI_CCU_MULT
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select SUNXI_CCU_NK
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select SUNXI_CCU_NKM
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select SUNXI_CCU_NKMP
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select SUNXI_CCU_NM
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select SUNXI_CCU_MP
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select SUNXI_CCU_PHASE
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default MACH_SUN8I
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depends on MACH_SUN8I || COMPILE_TEST
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config SUN8I_A33_CCU
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bool "Support for the Allwinner A33 CCU"
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select SUNXI_CCU_DIV
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select SUNXI_CCU_MULT
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select SUNXI_CCU_NK
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select SUNXI_CCU_NKM
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select SUNXI_CCU_NKMP
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select SUNXI_CCU_NM
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select SUNXI_CCU_MP
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select SUNXI_CCU_PHASE
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default MACH_SUN8I
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depends on MACH_SUN8I || COMPILE_TEST
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config SUN8I_H3_CCU
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bool "Support for the Allwinner H3 CCU"
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select SUNXI_CCU_DIV
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select SUNXI_CCU_NK
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select SUNXI_CCU_NKM
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select SUNXI_CCU_NKMP
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select SUNXI_CCU_NM
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select SUNXI_CCU_MP
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select SUNXI_CCU_PHASE
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default MACH_SUN8I || (ARM64 && ARCH_SUNXI)
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depends on MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST
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config SUN8I_V3S_CCU
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bool "Support for the Allwinner V3s CCU"
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select SUNXI_CCU_DIV
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select SUNXI_CCU_NK
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select SUNXI_CCU_NKM
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select SUNXI_CCU_NKMP
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select SUNXI_CCU_NM
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select SUNXI_CCU_MP
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select SUNXI_CCU_PHASE
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default MACH_SUN8I
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depends on MACH_SUN8I || COMPILE_TEST
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config SUN9I_A80_CCU
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bool "Support for the Allwinner A80 CCU"
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select SUNXI_CCU_DIV
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select SUNXI_CCU_MULT
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select SUNXI_CCU_GATE
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select SUNXI_CCU_NKMP
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select SUNXI_CCU_NM
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select SUNXI_CCU_MP
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select SUNXI_CCU_PHASE
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default MACH_SUN9I
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depends on MACH_SUN9I || COMPILE_TEST
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config SUN8I_R_CCU
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bool "Support for Allwinner SoCs' PRCM CCUs"
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select SUNXI_CCU_DIV
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select SUNXI_CCU_GATE
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default MACH_SUN8I || (ARCH_SUNXI && ARM64)
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endif
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