forked from Minki/linux
efdbd7345f
This is a quite large renaming to consolidate display related bindings into a single "display" directory from various scattered locations of video, drm, gpu, fb, mipi, and panel. The prior location was somewhat based on the Linux driver location, but bindings should be independent of that. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org>
212 lines
4.5 KiB
Plaintext
212 lines
4.5 KiB
Plaintext
Texas Instruments OMAP Display Subsystem
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========================================
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Generic Description
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-------------------
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This document is a generic description of the OMAP Display Subsystem bindings.
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Binding details for each OMAP SoC version are described in respective binding
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documentation.
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The OMAP Display Subsystem (DSS) hardware consists of DSS Core, DISPC module and
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a number of encoder modules. All DSS versions contain DSS Core and DISPC, but
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the encoder modules vary.
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The DSS Core is the parent of the other DSS modules, and manages clock routing,
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integration to the SoC, etc.
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DISPC is the display controller, which reads pixels from the memory and outputs
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a RGB pixel stream to encoders.
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The encoder modules encode the received RGB pixel stream to a video output like
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HDMI, MIPI DPI, etc.
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Video Ports
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-----------
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The DSS Core and the encoders have video port outputs. The structure of the
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video ports is described in Documentation/devicetree/bindings/graph.txt,
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and the properties for the ports and endpoints for each encoder are
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described in the SoC's DSS binding documentation.
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The video ports are used to describe the connections to external hardware, like
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panels or external encoders.
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Aliases
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-------
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The board dts file may define aliases for displays to assign "displayX" style
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name for each display. If no aliases are defined, a semi-random number is used
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for the display.
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Example
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-------
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A shortened example of the DSS description for OMAP4, with non-relevant parts
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removed, defined in omap4.dtsi:
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dss: dss@58000000 {
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compatible = "ti,omap4-dss";
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reg = <0x58000000 0x80>;
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status = "disabled";
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ti,hwmods = "dss_core";
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clocks = <&dss_dss_clk>;
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clock-names = "fck";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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dispc@58001000 {
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compatible = "ti,omap4-dispc";
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reg = <0x58001000 0x1000>;
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interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "dss_dispc";
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clocks = <&dss_dss_clk>;
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clock-names = "fck";
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};
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hdmi: encoder@58006000 {
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compatible = "ti,omap4-hdmi";
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reg = <0x58006000 0x200>,
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<0x58006200 0x100>,
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<0x58006300 0x100>,
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<0x58006400 0x1000>;
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reg-names = "wp", "pll", "phy", "core";
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interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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ti,hwmods = "dss_hdmi";
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clocks = <&dss_48mhz_clk>, <&dss_sys_clk>;
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clock-names = "fck", "sys_clk";
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};
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};
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A shortened example of the board description for OMAP4 Panda board, defined in
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omap4-panda.dts.
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The Panda board has a DVI and a HDMI connector, and the board contains a TFP410
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chip (MIPI DPI to DVI encoder) and a TPD12S015 chip (HDMI ESD protection & level
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shifter). The video pipelines for the connectors are formed as follows:
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DSS Core --(MIPI DPI)--> TFP410 --(DVI)--> DVI Connector
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OMAP HDMI --(HDMI)--> TPD12S015 --(HDMI)--> HDMI Connector
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/ {
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aliases {
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display0 = &dvi0;
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display1 = &hdmi0;
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};
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tfp410: encoder@0 {
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compatible = "ti,tfp410";
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gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; /* 0, power-down */
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pinctrl-names = "default";
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pinctrl-0 = <&tfp410_pins>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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tfp410_in: endpoint@0 {
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remote-endpoint = <&dpi_out>;
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};
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};
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port@1 {
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reg = <1>;
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tfp410_out: endpoint@0 {
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remote-endpoint = <&dvi_connector_in>;
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};
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};
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};
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};
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dvi0: connector@0 {
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compatible = "dvi-connector";
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label = "dvi";
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i2c-bus = <&i2c3>;
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port {
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dvi_connector_in: endpoint {
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remote-endpoint = <&tfp410_out>;
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};
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};
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};
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tpd12s015: encoder@1 {
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compatible = "ti,tpd12s015";
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pinctrl-names = "default";
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pinctrl-0 = <&tpd12s015_pins>;
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gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>, /* 60, CT CP HPD */
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<&gpio2 9 GPIO_ACTIVE_HIGH>, /* 41, LS OE */
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<&gpio2 31 GPIO_ACTIVE_HIGH>; /* 63, HPD */
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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tpd12s015_in: endpoint@0 {
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remote-endpoint = <&hdmi_out>;
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};
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};
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port@1 {
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reg = <1>;
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tpd12s015_out: endpoint@0 {
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remote-endpoint = <&hdmi_connector_in>;
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};
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};
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};
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};
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hdmi0: connector@1 {
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compatible = "hdmi-connector";
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label = "hdmi";
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port {
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hdmi_connector_in: endpoint {
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remote-endpoint = <&tpd12s015_out>;
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};
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};
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};
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};
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&dss {
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status = "ok";
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pinctrl-names = "default";
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pinctrl-0 = <&dss_dpi_pins>;
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port {
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dpi_out: endpoint {
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remote-endpoint = <&tfp410_in>;
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data-lines = <24>;
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};
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};
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};
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&hdmi {
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status = "ok";
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vdda-supply = <&vdac>;
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pinctrl-names = "default";
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pinctrl-0 = <&dss_hdmi_pins>;
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port {
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hdmi_out: endpoint {
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remote-endpoint = <&tpd12s015_in>;
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};
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};
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};
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