forked from Minki/linux
0ef1594c01
On some revisions of AT91 SoCs, the RTC IMR register is not working. Instead of elaborating a workaround for that specific SoC or IP version, we simply use a software variable to store the Interrupt Mask Register and modify it for each enabling/disabling of an interrupt. The overhead of this is negligible anyway. The interrupt mask register (IMR) for the RTC is broken on the AT91SAM9x5 sub-family of SoCs (good overview of the members here: http://www.eewiki.net/display/linuxonarm/AT91SAM9x5 ). The "user visible effect" is the RTC doesn't work. That sub-family is less than two years old and only has devicetree (DT) support and came online circa lk 3.7 . The dust is yet to settle on the DT stuff at least for AT91 SoCs (translation: lots of stuff is still broken, so much that it is hard to know where to start). The fix in the patch is pretty simple: just shadow the silicon IMR register with a variable in the driver. Some older SoCs (pre-DT) use the the rtc-at91rm9200 driver (e.g. obviously the AT91RM9200) and they should not be impacted by the change. There shouldn't be a large volume of interrupts associated with a RTC. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reported-by: Douglas Gilbert <dgilbert@interlog.com> Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Ludovic Desroches <ludovic.desroches@atmel.com> Cc: <stable@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
75 lines
3.1 KiB
C
75 lines
3.1 KiB
C
/*
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* arch/arm/mach-at91/include/mach/at91_rtc.h
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*
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* Copyright (C) 2005 Ivan Kokshaysky
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* Copyright (C) SAN People
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*
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* Real Time Clock (RTC) - System peripheral registers.
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* Based on AT91RM9200 datasheet revision E.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef AT91_RTC_H
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#define AT91_RTC_H
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#define AT91_RTC_CR 0x00 /* Control Register */
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#define AT91_RTC_UPDTIM (1 << 0) /* Update Request Time Register */
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#define AT91_RTC_UPDCAL (1 << 1) /* Update Request Calendar Register */
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#define AT91_RTC_TIMEVSEL (3 << 8) /* Time Event Selection */
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#define AT91_RTC_TIMEVSEL_MINUTE (0 << 8)
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#define AT91_RTC_TIMEVSEL_HOUR (1 << 8)
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#define AT91_RTC_TIMEVSEL_DAY24 (2 << 8)
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#define AT91_RTC_TIMEVSEL_DAY12 (3 << 8)
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#define AT91_RTC_CALEVSEL (3 << 16) /* Calendar Event Selection */
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#define AT91_RTC_CALEVSEL_WEEK (0 << 16)
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#define AT91_RTC_CALEVSEL_MONTH (1 << 16)
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#define AT91_RTC_CALEVSEL_YEAR (2 << 16)
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#define AT91_RTC_MR 0x04 /* Mode Register */
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#define AT91_RTC_HRMOD (1 << 0) /* 12/24 Hour Mode */
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#define AT91_RTC_TIMR 0x08 /* Time Register */
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#define AT91_RTC_SEC (0x7f << 0) /* Current Second */
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#define AT91_RTC_MIN (0x7f << 8) /* Current Minute */
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#define AT91_RTC_HOUR (0x3f << 16) /* Current Hour */
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#define AT91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */
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#define AT91_RTC_CALR 0x0c /* Calendar Register */
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#define AT91_RTC_CENT (0x7f << 0) /* Current Century */
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#define AT91_RTC_YEAR (0xff << 8) /* Current Year */
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#define AT91_RTC_MONTH (0x1f << 16) /* Current Month */
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#define AT91_RTC_DAY (7 << 21) /* Current Day */
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#define AT91_RTC_DATE (0x3f << 24) /* Current Date */
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#define AT91_RTC_TIMALR 0x10 /* Time Alarm Register */
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#define AT91_RTC_SECEN (1 << 7) /* Second Alarm Enable */
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#define AT91_RTC_MINEN (1 << 15) /* Minute Alarm Enable */
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#define AT91_RTC_HOUREN (1 << 23) /* Hour Alarm Enable */
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#define AT91_RTC_CALALR 0x14 /* Calendar Alarm Register */
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#define AT91_RTC_MTHEN (1 << 23) /* Month Alarm Enable */
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#define AT91_RTC_DATEEN (1 << 31) /* Date Alarm Enable */
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#define AT91_RTC_SR 0x18 /* Status Register */
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#define AT91_RTC_ACKUPD (1 << 0) /* Acknowledge for Update */
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#define AT91_RTC_ALARM (1 << 1) /* Alarm Flag */
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#define AT91_RTC_SECEV (1 << 2) /* Second Event */
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#define AT91_RTC_TIMEV (1 << 3) /* Time Event */
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#define AT91_RTC_CALEV (1 << 4) /* Calendar Event */
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#define AT91_RTC_SCCR 0x1c /* Status Clear Command Register */
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#define AT91_RTC_IER 0x20 /* Interrupt Enable Register */
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#define AT91_RTC_IDR 0x24 /* Interrupt Disable Register */
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#define AT91_RTC_VER 0x2c /* Valid Entry Register */
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#define AT91_RTC_NVTIM (1 << 0) /* Non valid Time */
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#define AT91_RTC_NVCAL (1 << 1) /* Non valid Calendar */
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#define AT91_RTC_NVTIMALR (1 << 2) /* Non valid Time Alarm */
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#define AT91_RTC_NVCALALR (1 << 3) /* Non valid Calendar Alarm */
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#endif
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