forked from Minki/linux
be0f272bfc
When building the arm64 kernel with both CONFIG_ARM64_MODULE_PLTS and CONFIG_DYNAMIC_FTRACE enabled, the ftrace-mod.o object file is built with the kernel and contains a trampoline that is linked into each module, so that modules can be loaded far away from the kernel and still reach the ftrace entry point in the core kernel with an ordinary relative branch, as is emitted by the compiler instrumentation code dynamic ftrace relies on. In order to be able to build out of tree modules, this object file needs to be included into the linux-headers or linux-devel packages, which is undesirable, as it makes arm64 a special case (although a precedent does exist for 32-bit PPC). Given that the trampoline essentially consists of a PLT entry, let's not bother with a source or object file for it, and simply patch it in whenever the trampoline is being populated, using the existing PLT support routines. Cc: <stable@vger.kernel.org> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
93 lines
2.7 KiB
C
93 lines
2.7 KiB
C
/*
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_MODULE_H
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#define __ASM_MODULE_H
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#include <asm-generic/module.h>
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#define MODULE_ARCH_VERMAGIC "aarch64"
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#ifdef CONFIG_ARM64_MODULE_PLTS
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struct mod_plt_sec {
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struct elf64_shdr *plt;
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int plt_num_entries;
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int plt_max_entries;
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};
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struct mod_arch_specific {
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struct mod_plt_sec core;
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struct mod_plt_sec init;
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/* for CONFIG_DYNAMIC_FTRACE */
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struct plt_entry *ftrace_trampoline;
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};
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#endif
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u64 module_emit_plt_entry(struct module *mod, void *loc, const Elf64_Rela *rela,
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Elf64_Sym *sym);
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#ifdef CONFIG_RANDOMIZE_BASE
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extern u64 module_alloc_base;
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#else
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#define module_alloc_base ((u64)_etext - MODULES_VSIZE)
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#endif
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struct plt_entry {
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/*
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* A program that conforms to the AArch64 Procedure Call Standard
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* (AAPCS64) must assume that a veneer that alters IP0 (x16) and/or
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* IP1 (x17) may be inserted at any branch instruction that is
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* exposed to a relocation that supports long branches. Since that
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* is exactly what we are dealing with here, we are free to use x16
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* as a scratch register in the PLT veneers.
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*/
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__le32 mov0; /* movn x16, #0x.... */
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__le32 mov1; /* movk x16, #0x...., lsl #16 */
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__le32 mov2; /* movk x16, #0x...., lsl #32 */
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__le32 br; /* br x16 */
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};
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static inline struct plt_entry get_plt_entry(u64 val)
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{
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/*
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* MOVK/MOVN/MOVZ opcode:
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* +--------+------------+--------+-----------+-------------+---------+
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* | sf[31] | opc[30:29] | 100101 | hw[22:21] | imm16[20:5] | Rd[4:0] |
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* +--------+------------+--------+-----------+-------------+---------+
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*
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* Rd := 0x10 (x16)
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* hw := 0b00 (no shift), 0b01 (lsl #16), 0b10 (lsl #32)
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* opc := 0b11 (MOVK), 0b00 (MOVN), 0b10 (MOVZ)
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* sf := 1 (64-bit variant)
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*/
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return (struct plt_entry){
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cpu_to_le32(0x92800010 | (((~val ) & 0xffff)) << 5),
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cpu_to_le32(0xf2a00010 | ((( val >> 16) & 0xffff)) << 5),
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cpu_to_le32(0xf2c00010 | ((( val >> 32) & 0xffff)) << 5),
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cpu_to_le32(0xd61f0200)
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};
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}
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static inline bool plt_entries_equal(const struct plt_entry *a,
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const struct plt_entry *b)
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{
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return a->mov0 == b->mov0 &&
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a->mov1 == b->mov1 &&
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a->mov2 == b->mov2;
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}
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#endif /* __ASM_MODULE_H */
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