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linux/arch/riscv
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Anup Patel 74c2e97b01 RISC-V: KVM: Fix incorrect KVM_MAX_VCPUS value 
The KVM_MAX_VCPUS value is supposed to be aligned with number of
VMID bits in the hgatp CSR but the current KVM_MAX_VCPUS value
is aligned with number of ASID bits in the satp CSR.

Fixes: 99cdc6c18c ("RISC-V: Add initial skeletal KVM support")
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
2021-11-22 10:36:19 +05:30
..
boot RISC-V DTS changes for v5.16 2021-10-21 08:22:37 -07:00
configs RISC-V: Enable KVM in RV64 and RV32 defconfigs as a module 2021-11-18 22:04:20 -08:00
errata riscv: skip errata_cip_453.o if CONFIG_ERRATA_SIFIVE_CIP_453 is disabled 2021-06-01 21:16:41 -07:00
include RISC-V: KVM: Fix incorrect KVM_MAX_VCPUS value 2021-11-22 10:36:19 +05:30
kernel RISC-V Patches for the 5.16 Merge Window, Part 1 2021-11-13 09:15:42 -08:00
kvm KVM: RISC-V: Unmap stage2 mapping when deleting/moving a memslot 2021-11-22 10:36:16 +05:30
lib include/linux/delay.h: replace kernel.h with the necessary inclusions 2021-11-09 10:02:49 -08:00
mm RISC-V Patches for the 5.16 Merge Window, Part 1 2021-11-13 09:15:42 -08:00
net riscv, bpf: Fix RV32 broken build, and silence RV64 warning 2021-11-05 16:52:34 +01:00
Kbuild kbuild: use more subdir- for visiting subdirectories while cleaning 2021-10-24 13:49:46 +09:00
Kconfig RISC-V Patches for the 5.16 Merge Window, Part 1 2021-11-13 09:15:42 -08:00
Kconfig.debug
Kconfig.erratas riscv: enable SiFive errata CIP-453 and CIP-1200 Kconfig only if CONFIG_64BIT=y 2021-05-06 09:40:13 -07:00
Kconfig.socs riscv: sifive: fix Kconfig errata warning 2021-06-12 17:20:50 -07:00
Makefile riscv: fix building external modules 2021-11-18 23:06:23 -08:00