forked from Minki/linux
daf93d2287
memset() was being called with the second parameter set to '\0', which is equivalent but longer than the more canonical 0. Update the code to use the latter variant consistently across the driver. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
379 lines
9.6 KiB
C
379 lines
9.6 KiB
C
/*
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* ChromeOS EC multi-function device (SPI)
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*
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* Copyright (C) 2012 Google, Inc
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/delay.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/mfd/cros_ec.h>
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#include <linux/mfd/cros_ec_commands.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/spi/spi.h>
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/* The header byte, which follows the preamble */
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#define EC_MSG_HEADER 0xec
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/*
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* Number of EC preamble bytes we read at a time. Since it takes
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* about 400-500us for the EC to respond there is not a lot of
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* point in tuning this. If the EC could respond faster then
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* we could increase this so that might expect the preamble and
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* message to occur in a single transaction. However, the maximum
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* SPI transfer size is 256 bytes, so at 5MHz we need a response
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* time of perhaps <320us (200 bytes / 1600 bits).
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*/
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#define EC_MSG_PREAMBLE_COUNT 32
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/*
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* We must get a response from the EC in 5ms. This is a very long
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* time, but the flash write command can take 2-3ms. The EC command
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* processing is currently not very fast (about 500us). We could
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* look at speeding this up and making the flash write command a
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* 'slow' command, requiring a GET_STATUS wait loop, like flash
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* erase.
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*/
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#define EC_MSG_DEADLINE_MS 5
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/*
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* Time between raising the SPI chip select (for the end of a
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* transaction) and dropping it again (for the next transaction).
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* If we go too fast, the EC will miss the transaction. We know that we
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* need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be
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* safe.
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*/
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#define EC_SPI_RECOVERY_TIME_NS (200 * 1000)
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/**
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* struct cros_ec_spi - information about a SPI-connected EC
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*
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* @spi: SPI device we are connected to
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* @last_transfer_ns: time that we last finished a transfer, or 0 if there
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* if no record
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*/
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struct cros_ec_spi {
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struct spi_device *spi;
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s64 last_transfer_ns;
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};
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static void debug_packet(struct device *dev, const char *name, u8 *ptr,
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int len)
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{
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#ifdef DEBUG
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int i;
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dev_dbg(dev, "%s: ", name);
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for (i = 0; i < len; i++)
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pr_cont(" %02x", ptr[i]);
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pr_cont("\n");
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#endif
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}
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/**
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* cros_ec_spi_receive_response - Receive a response from the EC.
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*
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* This function has two phases: reading the preamble bytes (since if we read
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* data from the EC before it is ready to send, we just get preamble) and
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* reading the actual message.
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*
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* The received data is placed into ec_dev->din.
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*
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* @ec_dev: ChromeOS EC device
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* @need_len: Number of message bytes we need to read
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*/
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static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev,
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int need_len)
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{
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struct cros_ec_spi *ec_spi = ec_dev->priv;
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struct spi_transfer trans;
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struct spi_message msg;
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u8 *ptr, *end;
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int ret;
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unsigned long deadline;
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int todo;
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/* Receive data until we see the header byte */
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deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
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do {
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memset(&trans, 0, sizeof(trans));
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trans.cs_change = 1;
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trans.rx_buf = ptr = ec_dev->din;
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trans.len = EC_MSG_PREAMBLE_COUNT;
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spi_message_init(&msg);
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spi_message_add_tail(&trans, &msg);
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ret = spi_sync(ec_spi->spi, &msg);
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if (ret < 0) {
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dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
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return ret;
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}
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for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
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if (*ptr == EC_MSG_HEADER) {
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dev_dbg(ec_dev->dev, "msg found at %zd\n",
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ptr - ec_dev->din);
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break;
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}
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}
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if (time_after(jiffies, deadline)) {
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dev_warn(ec_dev->dev, "EC failed to respond in time\n");
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return -ETIMEDOUT;
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}
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} while (ptr == end);
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/*
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* ptr now points to the header byte. Copy any valid data to the
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* start of our buffer
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*/
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todo = end - ++ptr;
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BUG_ON(todo < 0 || todo > ec_dev->din_size);
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todo = min(todo, need_len);
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memmove(ec_dev->din, ptr, todo);
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ptr = ec_dev->din + todo;
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dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
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need_len, todo);
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need_len -= todo;
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/* Receive data until we have it all */
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while (need_len > 0) {
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/*
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* We can't support transfers larger than the SPI FIFO size
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* unless we have DMA. We don't have DMA on the ISP SPI ports
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* for Exynos. We need a way of asking SPI driver for
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* maximum-supported transfer size.
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*/
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todo = min(need_len, 256);
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dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
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todo, need_len, ptr - ec_dev->din);
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memset(&trans, 0, sizeof(trans));
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trans.cs_change = 1;
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trans.rx_buf = ptr;
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trans.len = todo;
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spi_message_init(&msg);
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spi_message_add_tail(&trans, &msg);
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/* send command to EC and read answer */
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BUG_ON((u8 *)trans.rx_buf - ec_dev->din + todo >
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ec_dev->din_size);
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ret = spi_sync(ec_spi->spi, &msg);
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if (ret < 0) {
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dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
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return ret;
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}
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debug_packet(ec_dev->dev, "interim", ptr, todo);
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ptr += todo;
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need_len -= todo;
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}
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dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
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return 0;
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}
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/**
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* cros_ec_command_spi_xfer - Transfer a message over SPI and receive the reply
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*
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* @ec_dev: ChromeOS EC device
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* @ec_msg: Message to transfer
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*/
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static int cros_ec_command_spi_xfer(struct cros_ec_device *ec_dev,
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struct cros_ec_msg *ec_msg)
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{
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struct cros_ec_spi *ec_spi = ec_dev->priv;
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struct spi_transfer trans;
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struct spi_message msg;
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int i, len;
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u8 *ptr;
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int sum;
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int ret = 0, final_ret;
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struct timespec ts;
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len = cros_ec_prepare_tx(ec_dev, ec_msg);
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dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
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/* If it's too soon to do another transaction, wait */
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if (ec_spi->last_transfer_ns) {
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struct timespec ts;
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unsigned long delay; /* The delay completed so far */
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ktime_get_ts(&ts);
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delay = timespec_to_ns(&ts) - ec_spi->last_transfer_ns;
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if (delay < EC_SPI_RECOVERY_TIME_NS)
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ndelay(delay);
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}
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/* Transmit phase - send our message */
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debug_packet(ec_dev->dev, "out", ec_dev->dout, len);
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memset(&trans, 0, sizeof(trans));
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trans.tx_buf = ec_dev->dout;
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trans.len = len;
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trans.cs_change = 1;
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spi_message_init(&msg);
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spi_message_add_tail(&trans, &msg);
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ret = spi_sync(ec_spi->spi, &msg);
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/* Get the response */
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if (!ret) {
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ret = cros_ec_spi_receive_response(ec_dev,
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ec_msg->in_len + EC_MSG_TX_PROTO_BYTES);
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} else {
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dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
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}
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/* turn off CS */
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spi_message_init(&msg);
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final_ret = spi_sync(ec_spi->spi, &msg);
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ktime_get_ts(&ts);
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ec_spi->last_transfer_ns = timespec_to_ns(&ts);
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if (!ret)
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ret = final_ret;
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if (ret < 0) {
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dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
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return ret;
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}
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/* check response error code */
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ptr = ec_dev->din;
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if (ptr[0]) {
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dev_warn(ec_dev->dev, "command 0x%02x returned an error %d\n",
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ec_msg->cmd, ptr[0]);
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debug_packet(ec_dev->dev, "in_err", ptr, len);
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return -EINVAL;
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}
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len = ptr[1];
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sum = ptr[0] + ptr[1];
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if (len > ec_msg->in_len) {
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dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
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len, ec_msg->in_len);
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return -ENOSPC;
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}
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/* copy response packet payload and compute checksum */
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for (i = 0; i < len; i++) {
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sum += ptr[i + 2];
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if (ec_msg->in_len)
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ec_msg->in_buf[i] = ptr[i + 2];
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}
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sum &= 0xff;
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debug_packet(ec_dev->dev, "in", ptr, len + 3);
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if (sum != ptr[len + 2]) {
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dev_err(ec_dev->dev,
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"bad packet checksum, expected %02x, got %02x\n",
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sum, ptr[len + 2]);
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return -EBADMSG;
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}
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return 0;
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}
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static int cros_ec_spi_probe(struct spi_device *spi)
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{
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struct device *dev = &spi->dev;
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struct cros_ec_device *ec_dev;
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struct cros_ec_spi *ec_spi;
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int err;
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spi->bits_per_word = 8;
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spi->mode = SPI_MODE_0;
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err = spi_setup(spi);
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if (err < 0)
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return err;
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ec_spi = devm_kzalloc(dev, sizeof(*ec_spi), GFP_KERNEL);
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if (ec_spi == NULL)
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return -ENOMEM;
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ec_spi->spi = spi;
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ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
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if (!ec_dev)
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return -ENOMEM;
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spi_set_drvdata(spi, ec_dev);
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ec_dev->name = "SPI";
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ec_dev->dev = dev;
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ec_dev->priv = ec_spi;
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ec_dev->irq = spi->irq;
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ec_dev->command_xfer = cros_ec_command_spi_xfer;
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ec_dev->ec_name = ec_spi->spi->modalias;
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ec_dev->phys_name = dev_name(&ec_spi->spi->dev);
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ec_dev->parent = &ec_spi->spi->dev;
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ec_dev->din_size = EC_MSG_BYTES + EC_MSG_PREAMBLE_COUNT;
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ec_dev->dout_size = EC_MSG_BYTES;
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err = cros_ec_register(ec_dev);
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if (err) {
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dev_err(dev, "cannot register EC\n");
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return err;
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}
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return 0;
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}
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static int cros_ec_spi_remove(struct spi_device *spi)
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{
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struct cros_ec_device *ec_dev;
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ec_dev = spi_get_drvdata(spi);
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cros_ec_remove(ec_dev);
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return 0;
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}
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#ifdef CONFIG_PM_SLEEP
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static int cros_ec_spi_suspend(struct device *dev)
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{
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struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
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return cros_ec_suspend(ec_dev);
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}
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static int cros_ec_spi_resume(struct device *dev)
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{
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struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
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return cros_ec_resume(ec_dev);
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}
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#endif
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static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops, cros_ec_spi_suspend,
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cros_ec_spi_resume);
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static const struct spi_device_id cros_ec_spi_id[] = {
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{ "cros-ec-spi", 0 },
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{ }
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};
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MODULE_DEVICE_TABLE(spi, cros_ec_spi_id);
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static struct spi_driver cros_ec_driver_spi = {
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.driver = {
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.name = "cros-ec-spi",
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.owner = THIS_MODULE,
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.pm = &cros_ec_spi_pm_ops,
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},
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.probe = cros_ec_spi_probe,
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.remove = cros_ec_spi_remove,
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.id_table = cros_ec_spi_id,
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};
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module_spi_driver(cros_ec_driver_spi);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("ChromeOS EC multi function device (SPI)");
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