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linux/arch/x86/events/intel
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Harry Pan 5b16ef2e43 perf/x86/cstate: Add Jasper Lake CPU support 
The Jasper Lake processor is Tremont microarchitecture, reuse the
glm_cstates table of Goldmont and Goldmont Plus to enable the C-states
residency profiling.

Signed-off-by: Harry Pan <harry.pan@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20200402190658.1.Ic02e891daac41303aed1f2fc6c64f6110edd27bd@changeid
2020-04-22 21:43:12 +02:00
..
bts.c perf/x86/intel/bts: Fix the use of page_private() 2019-12-17 13:32:46 +01:00
core.c perf/x86/intel: Avoid unnecessary PEBS_ENABLE MSR access in PMI 2020-02-11 13:23:48 +01:00
cstate.c perf/x86/cstate: Add Jasper Lake CPU support 2020-04-22 21:43:12 +02:00
ds.c perf/x86/intel: Fix inaccurate period in context switch for auto-reload 2020-02-11 13:23:27 +01:00
knc.c
lbr.c perf/x86/intel: Output LBR TOS information correctly 2020-02-11 13:23:49 +01:00
Makefile
p4.c perf_event: Add support for LSM and SELinux checks 2019-10-17 21:31:55 +02:00
p6.c
pt.c perf/x86/intel/pt: Prevent redundant WRMSRs 2019-11-13 11:06:18 +01:00
pt.h perf/x86/intel/pt: Prevent redundant WRMSRs 2019-11-13 11:06:18 +01:00
rapl.c x86/perf/events: Convert to new CPU match macros 2020-03-24 21:22:28 +01:00
uncore_nhmex.c
uncore_snb.c perf/x86: Add Intel Tiger Lake uncore support 2020-02-11 13:23:49 +01:00
uncore_snbep.c perf/x86/intel/uncore: Add Ice Lake server uncore support 2020-04-08 11:33:46 +02:00
uncore.c perf/x86/intel/uncore: Add Ice Lake server uncore support 2020-04-08 11:33:46 +02:00
uncore.h perf/x86/intel/uncore: Add Ice Lake server uncore support 2020-04-08 11:33:46 +02:00