forked from Minki/linux
438a761679
VFP used __divdi3 64-bit division needlessly. Convert it to use our 64-bit by 32-bit division instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
1189 lines
28 KiB
C
1189 lines
28 KiB
C
/*
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* linux/arch/arm/vfp/vfpdouble.c
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*
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* This code is derived in part from John R. Housers softfloat library, which
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* carries the following notice:
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*
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* ===========================================================================
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* This C source file is part of the SoftFloat IEC/IEEE Floating-point
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* Arithmetic Package, Release 2.
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*
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* Written by John R. Hauser. This work was made possible in part by the
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* International Computer Science Institute, located at Suite 600, 1947 Center
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* Street, Berkeley, California 94704. Funding was partially provided by the
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* National Science Foundation under grant MIP-9311980. The original version
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* of this code was written as part of a project to build a fixed-point vector
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* processor in collaboration with the University of California at Berkeley,
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* overseen by Profs. Nelson Morgan and John Wawrzynek. More information
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* is available through the web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
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* arithmetic/softfloat.html'.
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*
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* THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
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* has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
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* TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
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* PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
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* AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
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*
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* Derivative works are acceptable, even for commercial purposes, so long as
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* (1) they include prominent notice that the work is derivative, and (2) they
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* include prominent notice akin to these three paragraphs for those parts of
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* this code that are retained.
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* ===========================================================================
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*/
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#include <linux/kernel.h>
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#include <linux/bitops.h>
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#include <asm/div64.h>
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#include <asm/ptrace.h>
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#include <asm/vfp.h>
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#include "vfpinstr.h"
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#include "vfp.h"
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static struct vfp_double vfp_double_default_qnan = {
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.exponent = 2047,
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.sign = 0,
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.significand = VFP_DOUBLE_SIGNIFICAND_QNAN,
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};
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static void vfp_double_dump(const char *str, struct vfp_double *d)
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{
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pr_debug("VFP: %s: sign=%d exponent=%d significand=%016llx\n",
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str, d->sign != 0, d->exponent, d->significand);
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}
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static void vfp_double_normalise_denormal(struct vfp_double *vd)
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{
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int bits = 31 - fls(vd->significand >> 32);
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if (bits == 31)
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bits = 62 - fls(vd->significand);
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vfp_double_dump("normalise_denormal: in", vd);
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if (bits) {
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vd->exponent -= bits - 1;
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vd->significand <<= bits;
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}
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vfp_double_dump("normalise_denormal: out", vd);
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}
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u32 vfp_double_normaliseround(int dd, struct vfp_double *vd, u32 fpscr, u32 exceptions, const char *func)
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{
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u64 significand, incr;
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int exponent, shift, underflow;
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u32 rmode;
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vfp_double_dump("pack: in", vd);
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/*
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* Infinities and NaNs are a special case.
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*/
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if (vd->exponent == 2047 && (vd->significand == 0 || exceptions))
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goto pack;
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/*
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* Special-case zero.
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*/
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if (vd->significand == 0) {
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vd->exponent = 0;
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goto pack;
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}
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exponent = vd->exponent;
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significand = vd->significand;
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shift = 32 - fls(significand >> 32);
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if (shift == 32)
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shift = 64 - fls(significand);
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if (shift) {
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exponent -= shift;
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significand <<= shift;
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}
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#ifdef DEBUG
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vd->exponent = exponent;
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vd->significand = significand;
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vfp_double_dump("pack: normalised", vd);
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#endif
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/*
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* Tiny number?
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*/
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underflow = exponent < 0;
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if (underflow) {
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significand = vfp_shiftright64jamming(significand, -exponent);
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exponent = 0;
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#ifdef DEBUG
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vd->exponent = exponent;
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vd->significand = significand;
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vfp_double_dump("pack: tiny number", vd);
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#endif
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if (!(significand & ((1ULL << (VFP_DOUBLE_LOW_BITS + 1)) - 1)))
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underflow = 0;
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}
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/*
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* Select rounding increment.
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*/
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incr = 0;
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rmode = fpscr & FPSCR_RMODE_MASK;
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if (rmode == FPSCR_ROUND_NEAREST) {
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incr = 1ULL << VFP_DOUBLE_LOW_BITS;
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if ((significand & (1ULL << (VFP_DOUBLE_LOW_BITS + 1))) == 0)
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incr -= 1;
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} else if (rmode == FPSCR_ROUND_TOZERO) {
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incr = 0;
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} else if ((rmode == FPSCR_ROUND_PLUSINF) ^ (vd->sign != 0))
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incr = (1ULL << (VFP_DOUBLE_LOW_BITS + 1)) - 1;
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pr_debug("VFP: rounding increment = 0x%08llx\n", incr);
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/*
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* Is our rounding going to overflow?
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*/
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if ((significand + incr) < significand) {
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exponent += 1;
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significand = (significand >> 1) | (significand & 1);
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incr >>= 1;
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#ifdef DEBUG
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vd->exponent = exponent;
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vd->significand = significand;
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vfp_double_dump("pack: overflow", vd);
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#endif
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}
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/*
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* If any of the low bits (which will be shifted out of the
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* number) are non-zero, the result is inexact.
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*/
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if (significand & ((1 << (VFP_DOUBLE_LOW_BITS + 1)) - 1))
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exceptions |= FPSCR_IXC;
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/*
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* Do our rounding.
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*/
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significand += incr;
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/*
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* Infinity?
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*/
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if (exponent >= 2046) {
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exceptions |= FPSCR_OFC | FPSCR_IXC;
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if (incr == 0) {
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vd->exponent = 2045;
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vd->significand = 0x7fffffffffffffffULL;
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} else {
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vd->exponent = 2047; /* infinity */
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vd->significand = 0;
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}
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} else {
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if (significand >> (VFP_DOUBLE_LOW_BITS + 1) == 0)
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exponent = 0;
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if (exponent || significand > 0x8000000000000000ULL)
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underflow = 0;
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if (underflow)
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exceptions |= FPSCR_UFC;
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vd->exponent = exponent;
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vd->significand = significand >> 1;
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}
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pack:
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vfp_double_dump("pack: final", vd);
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{
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s64 d = vfp_double_pack(vd);
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pr_debug("VFP: %s: d(d%d)=%016llx exceptions=%08x\n", func,
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dd, d, exceptions);
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vfp_put_double(dd, d);
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}
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return exceptions & ~VFP_NAN_FLAG;
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}
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/*
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* Propagate the NaN, setting exceptions if it is signalling.
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* 'n' is always a NaN. 'm' may be a number, NaN or infinity.
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*/
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static u32
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vfp_propagate_nan(struct vfp_double *vdd, struct vfp_double *vdn,
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struct vfp_double *vdm, u32 fpscr)
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{
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struct vfp_double *nan;
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int tn, tm = 0;
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tn = vfp_double_type(vdn);
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if (vdm)
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tm = vfp_double_type(vdm);
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if (fpscr & FPSCR_DEFAULT_NAN)
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/*
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* Default NaN mode - always returns a quiet NaN
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*/
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nan = &vfp_double_default_qnan;
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else {
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/*
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* Contemporary mode - select the first signalling
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* NAN, or if neither are signalling, the first
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* quiet NAN.
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*/
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if (tn == VFP_SNAN || (tm != VFP_SNAN && tn == VFP_QNAN))
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nan = vdn;
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else
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nan = vdm;
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/*
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* Make the NaN quiet.
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*/
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nan->significand |= VFP_DOUBLE_SIGNIFICAND_QNAN;
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}
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*vdd = *nan;
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/*
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* If one was a signalling NAN, raise invalid operation.
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*/
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return tn == VFP_SNAN || tm == VFP_SNAN ? FPSCR_IOC : VFP_NAN_FLAG;
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}
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/*
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* Extended operations
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*/
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static u32 vfp_double_fabs(int dd, int unused, int dm, u32 fpscr)
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{
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vfp_put_double(dd, vfp_double_packed_abs(vfp_get_double(dm)));
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return 0;
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}
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static u32 vfp_double_fcpy(int dd, int unused, int dm, u32 fpscr)
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{
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vfp_put_double(dd, vfp_get_double(dm));
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return 0;
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}
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static u32 vfp_double_fneg(int dd, int unused, int dm, u32 fpscr)
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{
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vfp_put_double(dd, vfp_double_packed_negate(vfp_get_double(dm)));
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return 0;
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}
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static u32 vfp_double_fsqrt(int dd, int unused, int dm, u32 fpscr)
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{
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struct vfp_double vdm, vdd;
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int ret, tm;
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vfp_double_unpack(&vdm, vfp_get_double(dm));
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tm = vfp_double_type(&vdm);
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if (tm & (VFP_NAN|VFP_INFINITY)) {
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struct vfp_double *vdp = &vdd;
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if (tm & VFP_NAN)
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ret = vfp_propagate_nan(vdp, &vdm, NULL, fpscr);
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else if (vdm.sign == 0) {
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sqrt_copy:
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vdp = &vdm;
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ret = 0;
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} else {
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sqrt_invalid:
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vdp = &vfp_double_default_qnan;
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ret = FPSCR_IOC;
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}
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vfp_put_double(dd, vfp_double_pack(vdp));
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return ret;
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}
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/*
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* sqrt(+/- 0) == +/- 0
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*/
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if (tm & VFP_ZERO)
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goto sqrt_copy;
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/*
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* Normalise a denormalised number
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*/
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if (tm & VFP_DENORMAL)
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vfp_double_normalise_denormal(&vdm);
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/*
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* sqrt(<0) = invalid
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*/
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if (vdm.sign)
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goto sqrt_invalid;
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vfp_double_dump("sqrt", &vdm);
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/*
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* Estimate the square root.
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*/
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vdd.sign = 0;
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vdd.exponent = ((vdm.exponent - 1023) >> 1) + 1023;
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vdd.significand = (u64)vfp_estimate_sqrt_significand(vdm.exponent, vdm.significand >> 32) << 31;
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vfp_double_dump("sqrt estimate1", &vdd);
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vdm.significand >>= 1 + (vdm.exponent & 1);
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vdd.significand += 2 + vfp_estimate_div128to64(vdm.significand, 0, vdd.significand);
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vfp_double_dump("sqrt estimate2", &vdd);
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/*
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* And now adjust.
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*/
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if ((vdd.significand & VFP_DOUBLE_LOW_BITS_MASK) <= 5) {
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if (vdd.significand < 2) {
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vdd.significand = ~0ULL;
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} else {
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u64 termh, terml, remh, reml;
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vdm.significand <<= 2;
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mul64to128(&termh, &terml, vdd.significand, vdd.significand);
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sub128(&remh, &reml, vdm.significand, 0, termh, terml);
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while ((s64)remh < 0) {
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vdd.significand -= 1;
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shift64left(&termh, &terml, vdd.significand);
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terml |= 1;
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add128(&remh, &reml, remh, reml, termh, terml);
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}
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vdd.significand |= (remh | reml) != 0;
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}
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}
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vdd.significand = vfp_shiftright64jamming(vdd.significand, 1);
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return vfp_double_normaliseround(dd, &vdd, fpscr, 0, "fsqrt");
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}
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/*
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* Equal := ZC
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* Less than := N
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* Greater than := C
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* Unordered := CV
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*/
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static u32 vfp_compare(int dd, int signal_on_qnan, int dm, u32 fpscr)
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{
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s64 d, m;
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u32 ret = 0;
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m = vfp_get_double(dm);
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if (vfp_double_packed_exponent(m) == 2047 && vfp_double_packed_mantissa(m)) {
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ret |= FPSCR_C | FPSCR_V;
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if (signal_on_qnan || !(vfp_double_packed_mantissa(m) & (1ULL << (VFP_DOUBLE_MANTISSA_BITS - 1))))
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/*
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* Signalling NaN, or signalling on quiet NaN
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*/
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ret |= FPSCR_IOC;
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}
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d = vfp_get_double(dd);
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if (vfp_double_packed_exponent(d) == 2047 && vfp_double_packed_mantissa(d)) {
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ret |= FPSCR_C | FPSCR_V;
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if (signal_on_qnan || !(vfp_double_packed_mantissa(d) & (1ULL << (VFP_DOUBLE_MANTISSA_BITS - 1))))
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/*
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* Signalling NaN, or signalling on quiet NaN
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*/
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ret |= FPSCR_IOC;
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}
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if (ret == 0) {
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if (d == m || vfp_double_packed_abs(d | m) == 0) {
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/*
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* equal
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*/
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ret |= FPSCR_Z | FPSCR_C;
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} else if (vfp_double_packed_sign(d ^ m)) {
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/*
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* different signs
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*/
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if (vfp_double_packed_sign(d))
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/*
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* d is negative, so d < m
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*/
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ret |= FPSCR_N;
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else
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/*
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* d is positive, so d > m
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*/
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ret |= FPSCR_C;
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} else if ((vfp_double_packed_sign(d) != 0) ^ (d < m)) {
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/*
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* d < m
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*/
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ret |= FPSCR_N;
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} else if ((vfp_double_packed_sign(d) != 0) ^ (d > m)) {
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/*
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* d > m
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*/
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ret |= FPSCR_C;
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}
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}
|
|
|
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return ret;
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}
|
|
|
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static u32 vfp_double_fcmp(int dd, int unused, int dm, u32 fpscr)
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{
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return vfp_compare(dd, 0, dm, fpscr);
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}
|
|
|
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static u32 vfp_double_fcmpe(int dd, int unused, int dm, u32 fpscr)
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{
|
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return vfp_compare(dd, 1, dm, fpscr);
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}
|
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|
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static u32 vfp_double_fcmpz(int dd, int unused, int dm, u32 fpscr)
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{
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return vfp_compare(dd, 0, VFP_REG_ZERO, fpscr);
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}
|
|
|
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static u32 vfp_double_fcmpez(int dd, int unused, int dm, u32 fpscr)
|
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{
|
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return vfp_compare(dd, 1, VFP_REG_ZERO, fpscr);
|
|
}
|
|
|
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static u32 vfp_double_fcvts(int sd, int unused, int dm, u32 fpscr)
|
|
{
|
|
struct vfp_double vdm;
|
|
struct vfp_single vsd;
|
|
int tm;
|
|
u32 exceptions = 0;
|
|
|
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vfp_double_unpack(&vdm, vfp_get_double(dm));
|
|
|
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tm = vfp_double_type(&vdm);
|
|
|
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/*
|
|
* If we have a signalling NaN, signal invalid operation.
|
|
*/
|
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if (tm == VFP_SNAN)
|
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exceptions = FPSCR_IOC;
|
|
|
|
if (tm & VFP_DENORMAL)
|
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vfp_double_normalise_denormal(&vdm);
|
|
|
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vsd.sign = vdm.sign;
|
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vsd.significand = vfp_hi64to32jamming(vdm.significand);
|
|
|
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/*
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|
* If we have an infinity or a NaN, the exponent must be 255
|
|
*/
|
|
if (tm & (VFP_INFINITY|VFP_NAN)) {
|
|
vsd.exponent = 255;
|
|
if (tm & VFP_NAN)
|
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vsd.significand |= VFP_SINGLE_SIGNIFICAND_QNAN;
|
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goto pack_nan;
|
|
} else if (tm & VFP_ZERO)
|
|
vsd.exponent = 0;
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else
|
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vsd.exponent = vdm.exponent - (1023 - 127);
|
|
|
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return vfp_single_normaliseround(sd, &vsd, fpscr, exceptions, "fcvts");
|
|
|
|
pack_nan:
|
|
vfp_put_float(sd, vfp_single_pack(&vsd));
|
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return exceptions;
|
|
}
|
|
|
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static u32 vfp_double_fuito(int dd, int unused, int dm, u32 fpscr)
|
|
{
|
|
struct vfp_double vdm;
|
|
u32 m = vfp_get_float(dm);
|
|
|
|
vdm.sign = 0;
|
|
vdm.exponent = 1023 + 63 - 1;
|
|
vdm.significand = (u64)m;
|
|
|
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return vfp_double_normaliseround(dd, &vdm, fpscr, 0, "fuito");
|
|
}
|
|
|
|
static u32 vfp_double_fsito(int dd, int unused, int dm, u32 fpscr)
|
|
{
|
|
struct vfp_double vdm;
|
|
u32 m = vfp_get_float(dm);
|
|
|
|
vdm.sign = (m & 0x80000000) >> 16;
|
|
vdm.exponent = 1023 + 63 - 1;
|
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vdm.significand = vdm.sign ? -m : m;
|
|
|
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return vfp_double_normaliseround(dd, &vdm, fpscr, 0, "fsito");
|
|
}
|
|
|
|
static u32 vfp_double_ftoui(int sd, int unused, int dm, u32 fpscr)
|
|
{
|
|
struct vfp_double vdm;
|
|
u32 d, exceptions = 0;
|
|
int rmode = fpscr & FPSCR_RMODE_MASK;
|
|
int tm;
|
|
|
|
vfp_double_unpack(&vdm, vfp_get_double(dm));
|
|
|
|
/*
|
|
* Do we have a denormalised number?
|
|
*/
|
|
tm = vfp_double_type(&vdm);
|
|
if (tm & VFP_DENORMAL)
|
|
exceptions |= FPSCR_IDC;
|
|
|
|
if (tm & VFP_NAN)
|
|
vdm.sign = 0;
|
|
|
|
if (vdm.exponent >= 1023 + 32) {
|
|
d = vdm.sign ? 0 : 0xffffffff;
|
|
exceptions = FPSCR_IOC;
|
|
} else if (vdm.exponent >= 1023 - 1) {
|
|
int shift = 1023 + 63 - vdm.exponent;
|
|
u64 rem, incr = 0;
|
|
|
|
/*
|
|
* 2^0 <= m < 2^32-2^8
|
|
*/
|
|
d = (vdm.significand << 1) >> shift;
|
|
rem = vdm.significand << (65 - shift);
|
|
|
|
if (rmode == FPSCR_ROUND_NEAREST) {
|
|
incr = 0x8000000000000000ULL;
|
|
if ((d & 1) == 0)
|
|
incr -= 1;
|
|
} else if (rmode == FPSCR_ROUND_TOZERO) {
|
|
incr = 0;
|
|
} else if ((rmode == FPSCR_ROUND_PLUSINF) ^ (vdm.sign != 0)) {
|
|
incr = ~0ULL;
|
|
}
|
|
|
|
if ((rem + incr) < rem) {
|
|
if (d < 0xffffffff)
|
|
d += 1;
|
|
else
|
|
exceptions |= FPSCR_IOC;
|
|
}
|
|
|
|
if (d && vdm.sign) {
|
|
d = 0;
|
|
exceptions |= FPSCR_IOC;
|
|
} else if (rem)
|
|
exceptions |= FPSCR_IXC;
|
|
} else {
|
|
d = 0;
|
|
if (vdm.exponent | vdm.significand) {
|
|
exceptions |= FPSCR_IXC;
|
|
if (rmode == FPSCR_ROUND_PLUSINF && vdm.sign == 0)
|
|
d = 1;
|
|
else if (rmode == FPSCR_ROUND_MINUSINF && vdm.sign) {
|
|
d = 0;
|
|
exceptions |= FPSCR_IOC;
|
|
}
|
|
}
|
|
}
|
|
|
|
pr_debug("VFP: ftoui: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions);
|
|
|
|
vfp_put_float(sd, d);
|
|
|
|
return exceptions;
|
|
}
|
|
|
|
static u32 vfp_double_ftouiz(int sd, int unused, int dm, u32 fpscr)
|
|
{
|
|
return vfp_double_ftoui(sd, unused, dm, FPSCR_ROUND_TOZERO);
|
|
}
|
|
|
|
static u32 vfp_double_ftosi(int sd, int unused, int dm, u32 fpscr)
|
|
{
|
|
struct vfp_double vdm;
|
|
u32 d, exceptions = 0;
|
|
int rmode = fpscr & FPSCR_RMODE_MASK;
|
|
|
|
vfp_double_unpack(&vdm, vfp_get_double(dm));
|
|
vfp_double_dump("VDM", &vdm);
|
|
|
|
/*
|
|
* Do we have denormalised number?
|
|
*/
|
|
if (vfp_double_type(&vdm) & VFP_DENORMAL)
|
|
exceptions |= FPSCR_IDC;
|
|
|
|
if (vdm.exponent >= 1023 + 32) {
|
|
d = 0x7fffffff;
|
|
if (vdm.sign)
|
|
d = ~d;
|
|
exceptions |= FPSCR_IOC;
|
|
} else if (vdm.exponent >= 1023 - 1) {
|
|
int shift = 1023 + 63 - vdm.exponent; /* 58 */
|
|
u64 rem, incr = 0;
|
|
|
|
d = (vdm.significand << 1) >> shift;
|
|
rem = vdm.significand << (65 - shift);
|
|
|
|
if (rmode == FPSCR_ROUND_NEAREST) {
|
|
incr = 0x8000000000000000ULL;
|
|
if ((d & 1) == 0)
|
|
incr -= 1;
|
|
} else if (rmode == FPSCR_ROUND_TOZERO) {
|
|
incr = 0;
|
|
} else if ((rmode == FPSCR_ROUND_PLUSINF) ^ (vdm.sign != 0)) {
|
|
incr = ~0ULL;
|
|
}
|
|
|
|
if ((rem + incr) < rem && d < 0xffffffff)
|
|
d += 1;
|
|
if (d > 0x7fffffff + (vdm.sign != 0)) {
|
|
d = 0x7fffffff + (vdm.sign != 0);
|
|
exceptions |= FPSCR_IOC;
|
|
} else if (rem)
|
|
exceptions |= FPSCR_IXC;
|
|
|
|
if (vdm.sign)
|
|
d = -d;
|
|
} else {
|
|
d = 0;
|
|
if (vdm.exponent | vdm.significand) {
|
|
exceptions |= FPSCR_IXC;
|
|
if (rmode == FPSCR_ROUND_PLUSINF && vdm.sign == 0)
|
|
d = 1;
|
|
else if (rmode == FPSCR_ROUND_MINUSINF && vdm.sign)
|
|
d = -1;
|
|
}
|
|
}
|
|
|
|
pr_debug("VFP: ftosi: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions);
|
|
|
|
vfp_put_float(sd, (s32)d);
|
|
|
|
return exceptions;
|
|
}
|
|
|
|
static u32 vfp_double_ftosiz(int dd, int unused, int dm, u32 fpscr)
|
|
{
|
|
return vfp_double_ftosi(dd, unused, dm, FPSCR_ROUND_TOZERO);
|
|
}
|
|
|
|
|
|
static u32 (* const fop_extfns[32])(int dd, int unused, int dm, u32 fpscr) = {
|
|
[FEXT_TO_IDX(FEXT_FCPY)] = vfp_double_fcpy,
|
|
[FEXT_TO_IDX(FEXT_FABS)] = vfp_double_fabs,
|
|
[FEXT_TO_IDX(FEXT_FNEG)] = vfp_double_fneg,
|
|
[FEXT_TO_IDX(FEXT_FSQRT)] = vfp_double_fsqrt,
|
|
[FEXT_TO_IDX(FEXT_FCMP)] = vfp_double_fcmp,
|
|
[FEXT_TO_IDX(FEXT_FCMPE)] = vfp_double_fcmpe,
|
|
[FEXT_TO_IDX(FEXT_FCMPZ)] = vfp_double_fcmpz,
|
|
[FEXT_TO_IDX(FEXT_FCMPEZ)] = vfp_double_fcmpez,
|
|
[FEXT_TO_IDX(FEXT_FCVT)] = vfp_double_fcvts,
|
|
[FEXT_TO_IDX(FEXT_FUITO)] = vfp_double_fuito,
|
|
[FEXT_TO_IDX(FEXT_FSITO)] = vfp_double_fsito,
|
|
[FEXT_TO_IDX(FEXT_FTOUI)] = vfp_double_ftoui,
|
|
[FEXT_TO_IDX(FEXT_FTOUIZ)] = vfp_double_ftouiz,
|
|
[FEXT_TO_IDX(FEXT_FTOSI)] = vfp_double_ftosi,
|
|
[FEXT_TO_IDX(FEXT_FTOSIZ)] = vfp_double_ftosiz,
|
|
};
|
|
|
|
|
|
|
|
|
|
static u32
|
|
vfp_double_fadd_nonnumber(struct vfp_double *vdd, struct vfp_double *vdn,
|
|
struct vfp_double *vdm, u32 fpscr)
|
|
{
|
|
struct vfp_double *vdp;
|
|
u32 exceptions = 0;
|
|
int tn, tm;
|
|
|
|
tn = vfp_double_type(vdn);
|
|
tm = vfp_double_type(vdm);
|
|
|
|
if (tn & tm & VFP_INFINITY) {
|
|
/*
|
|
* Two infinities. Are they different signs?
|
|
*/
|
|
if (vdn->sign ^ vdm->sign) {
|
|
/*
|
|
* different signs -> invalid
|
|
*/
|
|
exceptions = FPSCR_IOC;
|
|
vdp = &vfp_double_default_qnan;
|
|
} else {
|
|
/*
|
|
* same signs -> valid
|
|
*/
|
|
vdp = vdn;
|
|
}
|
|
} else if (tn & VFP_INFINITY && tm & VFP_NUMBER) {
|
|
/*
|
|
* One infinity and one number -> infinity
|
|
*/
|
|
vdp = vdn;
|
|
} else {
|
|
/*
|
|
* 'n' is a NaN of some type
|
|
*/
|
|
return vfp_propagate_nan(vdd, vdn, vdm, fpscr);
|
|
}
|
|
*vdd = *vdp;
|
|
return exceptions;
|
|
}
|
|
|
|
static u32
|
|
vfp_double_add(struct vfp_double *vdd, struct vfp_double *vdn,
|
|
struct vfp_double *vdm, u32 fpscr)
|
|
{
|
|
u32 exp_diff;
|
|
u64 m_sig;
|
|
|
|
if (vdn->significand & (1ULL << 63) ||
|
|
vdm->significand & (1ULL << 63)) {
|
|
pr_info("VFP: bad FP values in %s\n", __func__);
|
|
vfp_double_dump("VDN", vdn);
|
|
vfp_double_dump("VDM", vdm);
|
|
}
|
|
|
|
/*
|
|
* Ensure that 'n' is the largest magnitude number. Note that
|
|
* if 'n' and 'm' have equal exponents, we do not swap them.
|
|
* This ensures that NaN propagation works correctly.
|
|
*/
|
|
if (vdn->exponent < vdm->exponent) {
|
|
struct vfp_double *t = vdn;
|
|
vdn = vdm;
|
|
vdm = t;
|
|
}
|
|
|
|
/*
|
|
* Is 'n' an infinity or a NaN? Note that 'm' may be a number,
|
|
* infinity or a NaN here.
|
|
*/
|
|
if (vdn->exponent == 2047)
|
|
return vfp_double_fadd_nonnumber(vdd, vdn, vdm, fpscr);
|
|
|
|
/*
|
|
* We have two proper numbers, where 'vdn' is the larger magnitude.
|
|
*
|
|
* Copy 'n' to 'd' before doing the arithmetic.
|
|
*/
|
|
*vdd = *vdn;
|
|
|
|
/*
|
|
* Align 'm' with the result.
|
|
*/
|
|
exp_diff = vdn->exponent - vdm->exponent;
|
|
m_sig = vfp_shiftright64jamming(vdm->significand, exp_diff);
|
|
|
|
/*
|
|
* If the signs are different, we are really subtracting.
|
|
*/
|
|
if (vdn->sign ^ vdm->sign) {
|
|
m_sig = vdn->significand - m_sig;
|
|
if ((s64)m_sig < 0) {
|
|
vdd->sign = vfp_sign_negate(vdd->sign);
|
|
m_sig = -m_sig;
|
|
}
|
|
} else {
|
|
m_sig += vdn->significand;
|
|
}
|
|
vdd->significand = m_sig;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static u32
|
|
vfp_double_multiply(struct vfp_double *vdd, struct vfp_double *vdn,
|
|
struct vfp_double *vdm, u32 fpscr)
|
|
{
|
|
vfp_double_dump("VDN", vdn);
|
|
vfp_double_dump("VDM", vdm);
|
|
|
|
/*
|
|
* Ensure that 'n' is the largest magnitude number. Note that
|
|
* if 'n' and 'm' have equal exponents, we do not swap them.
|
|
* This ensures that NaN propagation works correctly.
|
|
*/
|
|
if (vdn->exponent < vdm->exponent) {
|
|
struct vfp_double *t = vdn;
|
|
vdn = vdm;
|
|
vdm = t;
|
|
pr_debug("VFP: swapping M <-> N\n");
|
|
}
|
|
|
|
vdd->sign = vdn->sign ^ vdm->sign;
|
|
|
|
/*
|
|
* If 'n' is an infinity or NaN, handle it. 'm' may be anything.
|
|
*/
|
|
if (vdn->exponent == 2047) {
|
|
if (vdn->significand || (vdm->exponent == 2047 && vdm->significand))
|
|
return vfp_propagate_nan(vdd, vdn, vdm, fpscr);
|
|
if ((vdm->exponent | vdm->significand) == 0) {
|
|
*vdd = vfp_double_default_qnan;
|
|
return FPSCR_IOC;
|
|
}
|
|
vdd->exponent = vdn->exponent;
|
|
vdd->significand = 0;
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* If 'm' is zero, the result is always zero. In this case,
|
|
* 'n' may be zero or a number, but it doesn't matter which.
|
|
*/
|
|
if ((vdm->exponent | vdm->significand) == 0) {
|
|
vdd->exponent = 0;
|
|
vdd->significand = 0;
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* We add 2 to the destination exponent for the same reason
|
|
* as the addition case - though this time we have +1 from
|
|
* each input operand.
|
|
*/
|
|
vdd->exponent = vdn->exponent + vdm->exponent - 1023 + 2;
|
|
vdd->significand = vfp_hi64multiply64(vdn->significand, vdm->significand);
|
|
|
|
vfp_double_dump("VDD", vdd);
|
|
return 0;
|
|
}
|
|
|
|
#define NEG_MULTIPLY (1 << 0)
|
|
#define NEG_SUBTRACT (1 << 1)
|
|
|
|
static u32
|
|
vfp_double_multiply_accumulate(int dd, int dn, int dm, u32 fpscr, u32 negate, char *func)
|
|
{
|
|
struct vfp_double vdd, vdp, vdn, vdm;
|
|
u32 exceptions;
|
|
|
|
vfp_double_unpack(&vdn, vfp_get_double(dn));
|
|
if (vdn.exponent == 0 && vdn.significand)
|
|
vfp_double_normalise_denormal(&vdn);
|
|
|
|
vfp_double_unpack(&vdm, vfp_get_double(dm));
|
|
if (vdm.exponent == 0 && vdm.significand)
|
|
vfp_double_normalise_denormal(&vdm);
|
|
|
|
exceptions = vfp_double_multiply(&vdp, &vdn, &vdm, fpscr);
|
|
if (negate & NEG_MULTIPLY)
|
|
vdp.sign = vfp_sign_negate(vdp.sign);
|
|
|
|
vfp_double_unpack(&vdn, vfp_get_double(dd));
|
|
if (negate & NEG_SUBTRACT)
|
|
vdn.sign = vfp_sign_negate(vdn.sign);
|
|
|
|
exceptions |= vfp_double_add(&vdd, &vdn, &vdp, fpscr);
|
|
|
|
return vfp_double_normaliseround(dd, &vdd, fpscr, exceptions, func);
|
|
}
|
|
|
|
/*
|
|
* Standard operations
|
|
*/
|
|
|
|
/*
|
|
* sd = sd + (sn * sm)
|
|
*/
|
|
static u32 vfp_double_fmac(int dd, int dn, int dm, u32 fpscr)
|
|
{
|
|
return vfp_double_multiply_accumulate(dd, dn, dm, fpscr, 0, "fmac");
|
|
}
|
|
|
|
/*
|
|
* sd = sd - (sn * sm)
|
|
*/
|
|
static u32 vfp_double_fnmac(int dd, int dn, int dm, u32 fpscr)
|
|
{
|
|
return vfp_double_multiply_accumulate(dd, dn, dm, fpscr, NEG_MULTIPLY, "fnmac");
|
|
}
|
|
|
|
/*
|
|
* sd = -sd + (sn * sm)
|
|
*/
|
|
static u32 vfp_double_fmsc(int dd, int dn, int dm, u32 fpscr)
|
|
{
|
|
return vfp_double_multiply_accumulate(dd, dn, dm, fpscr, NEG_SUBTRACT, "fmsc");
|
|
}
|
|
|
|
/*
|
|
* sd = -sd - (sn * sm)
|
|
*/
|
|
static u32 vfp_double_fnmsc(int dd, int dn, int dm, u32 fpscr)
|
|
{
|
|
return vfp_double_multiply_accumulate(dd, dn, dm, fpscr, NEG_SUBTRACT | NEG_MULTIPLY, "fnmsc");
|
|
}
|
|
|
|
/*
|
|
* sd = sn * sm
|
|
*/
|
|
static u32 vfp_double_fmul(int dd, int dn, int dm, u32 fpscr)
|
|
{
|
|
struct vfp_double vdd, vdn, vdm;
|
|
u32 exceptions;
|
|
|
|
vfp_double_unpack(&vdn, vfp_get_double(dn));
|
|
if (vdn.exponent == 0 && vdn.significand)
|
|
vfp_double_normalise_denormal(&vdn);
|
|
|
|
vfp_double_unpack(&vdm, vfp_get_double(dm));
|
|
if (vdm.exponent == 0 && vdm.significand)
|
|
vfp_double_normalise_denormal(&vdm);
|
|
|
|
exceptions = vfp_double_multiply(&vdd, &vdn, &vdm, fpscr);
|
|
return vfp_double_normaliseround(dd, &vdd, fpscr, exceptions, "fmul");
|
|
}
|
|
|
|
/*
|
|
* sd = -(sn * sm)
|
|
*/
|
|
static u32 vfp_double_fnmul(int dd, int dn, int dm, u32 fpscr)
|
|
{
|
|
struct vfp_double vdd, vdn, vdm;
|
|
u32 exceptions;
|
|
|
|
vfp_double_unpack(&vdn, vfp_get_double(dn));
|
|
if (vdn.exponent == 0 && vdn.significand)
|
|
vfp_double_normalise_denormal(&vdn);
|
|
|
|
vfp_double_unpack(&vdm, vfp_get_double(dm));
|
|
if (vdm.exponent == 0 && vdm.significand)
|
|
vfp_double_normalise_denormal(&vdm);
|
|
|
|
exceptions = vfp_double_multiply(&vdd, &vdn, &vdm, fpscr);
|
|
vdd.sign = vfp_sign_negate(vdd.sign);
|
|
|
|
return vfp_double_normaliseround(dd, &vdd, fpscr, exceptions, "fnmul");
|
|
}
|
|
|
|
/*
|
|
* sd = sn + sm
|
|
*/
|
|
static u32 vfp_double_fadd(int dd, int dn, int dm, u32 fpscr)
|
|
{
|
|
struct vfp_double vdd, vdn, vdm;
|
|
u32 exceptions;
|
|
|
|
vfp_double_unpack(&vdn, vfp_get_double(dn));
|
|
if (vdn.exponent == 0 && vdn.significand)
|
|
vfp_double_normalise_denormal(&vdn);
|
|
|
|
vfp_double_unpack(&vdm, vfp_get_double(dm));
|
|
if (vdm.exponent == 0 && vdm.significand)
|
|
vfp_double_normalise_denormal(&vdm);
|
|
|
|
exceptions = vfp_double_add(&vdd, &vdn, &vdm, fpscr);
|
|
|
|
return vfp_double_normaliseround(dd, &vdd, fpscr, exceptions, "fadd");
|
|
}
|
|
|
|
/*
|
|
* sd = sn - sm
|
|
*/
|
|
static u32 vfp_double_fsub(int dd, int dn, int dm, u32 fpscr)
|
|
{
|
|
struct vfp_double vdd, vdn, vdm;
|
|
u32 exceptions;
|
|
|
|
vfp_double_unpack(&vdn, vfp_get_double(dn));
|
|
if (vdn.exponent == 0 && vdn.significand)
|
|
vfp_double_normalise_denormal(&vdn);
|
|
|
|
vfp_double_unpack(&vdm, vfp_get_double(dm));
|
|
if (vdm.exponent == 0 && vdm.significand)
|
|
vfp_double_normalise_denormal(&vdm);
|
|
|
|
/*
|
|
* Subtraction is like addition, but with a negated operand.
|
|
*/
|
|
vdm.sign = vfp_sign_negate(vdm.sign);
|
|
|
|
exceptions = vfp_double_add(&vdd, &vdn, &vdm, fpscr);
|
|
|
|
return vfp_double_normaliseround(dd, &vdd, fpscr, exceptions, "fsub");
|
|
}
|
|
|
|
/*
|
|
* sd = sn / sm
|
|
*/
|
|
static u32 vfp_double_fdiv(int dd, int dn, int dm, u32 fpscr)
|
|
{
|
|
struct vfp_double vdd, vdn, vdm;
|
|
u32 exceptions = 0;
|
|
int tm, tn;
|
|
|
|
vfp_double_unpack(&vdn, vfp_get_double(dn));
|
|
vfp_double_unpack(&vdm, vfp_get_double(dm));
|
|
|
|
vdd.sign = vdn.sign ^ vdm.sign;
|
|
|
|
tn = vfp_double_type(&vdn);
|
|
tm = vfp_double_type(&vdm);
|
|
|
|
/*
|
|
* Is n a NAN?
|
|
*/
|
|
if (tn & VFP_NAN)
|
|
goto vdn_nan;
|
|
|
|
/*
|
|
* Is m a NAN?
|
|
*/
|
|
if (tm & VFP_NAN)
|
|
goto vdm_nan;
|
|
|
|
/*
|
|
* If n and m are infinity, the result is invalid
|
|
* If n and m are zero, the result is invalid
|
|
*/
|
|
if (tm & tn & (VFP_INFINITY|VFP_ZERO))
|
|
goto invalid;
|
|
|
|
/*
|
|
* If n is infinity, the result is infinity
|
|
*/
|
|
if (tn & VFP_INFINITY)
|
|
goto infinity;
|
|
|
|
/*
|
|
* If m is zero, raise div0 exceptions
|
|
*/
|
|
if (tm & VFP_ZERO)
|
|
goto divzero;
|
|
|
|
/*
|
|
* If m is infinity, or n is zero, the result is zero
|
|
*/
|
|
if (tm & VFP_INFINITY || tn & VFP_ZERO)
|
|
goto zero;
|
|
|
|
if (tn & VFP_DENORMAL)
|
|
vfp_double_normalise_denormal(&vdn);
|
|
if (tm & VFP_DENORMAL)
|
|
vfp_double_normalise_denormal(&vdm);
|
|
|
|
/*
|
|
* Ok, we have two numbers, we can perform division.
|
|
*/
|
|
vdd.exponent = vdn.exponent - vdm.exponent + 1023 - 1;
|
|
vdm.significand <<= 1;
|
|
if (vdm.significand <= (2 * vdn.significand)) {
|
|
vdn.significand >>= 1;
|
|
vdd.exponent++;
|
|
}
|
|
vdd.significand = vfp_estimate_div128to64(vdn.significand, 0, vdm.significand);
|
|
if ((vdd.significand & 0x1ff) <= 2) {
|
|
u64 termh, terml, remh, reml;
|
|
mul64to128(&termh, &terml, vdm.significand, vdd.significand);
|
|
sub128(&remh, &reml, vdn.significand, 0, termh, terml);
|
|
while ((s64)remh < 0) {
|
|
vdd.significand -= 1;
|
|
add128(&remh, &reml, remh, reml, 0, vdm.significand);
|
|
}
|
|
vdd.significand |= (reml != 0);
|
|
}
|
|
return vfp_double_normaliseround(dd, &vdd, fpscr, 0, "fdiv");
|
|
|
|
vdn_nan:
|
|
exceptions = vfp_propagate_nan(&vdd, &vdn, &vdm, fpscr);
|
|
pack:
|
|
vfp_put_double(dd, vfp_double_pack(&vdd));
|
|
return exceptions;
|
|
|
|
vdm_nan:
|
|
exceptions = vfp_propagate_nan(&vdd, &vdm, &vdn, fpscr);
|
|
goto pack;
|
|
|
|
zero:
|
|
vdd.exponent = 0;
|
|
vdd.significand = 0;
|
|
goto pack;
|
|
|
|
divzero:
|
|
exceptions = FPSCR_DZC;
|
|
infinity:
|
|
vdd.exponent = 2047;
|
|
vdd.significand = 0;
|
|
goto pack;
|
|
|
|
invalid:
|
|
vfp_put_double(dd, vfp_double_pack(&vfp_double_default_qnan));
|
|
return FPSCR_IOC;
|
|
}
|
|
|
|
static u32 (* const fop_fns[16])(int dd, int dn, int dm, u32 fpscr) = {
|
|
[FOP_TO_IDX(FOP_FMAC)] = vfp_double_fmac,
|
|
[FOP_TO_IDX(FOP_FNMAC)] = vfp_double_fnmac,
|
|
[FOP_TO_IDX(FOP_FMSC)] = vfp_double_fmsc,
|
|
[FOP_TO_IDX(FOP_FNMSC)] = vfp_double_fnmsc,
|
|
[FOP_TO_IDX(FOP_FMUL)] = vfp_double_fmul,
|
|
[FOP_TO_IDX(FOP_FNMUL)] = vfp_double_fnmul,
|
|
[FOP_TO_IDX(FOP_FADD)] = vfp_double_fadd,
|
|
[FOP_TO_IDX(FOP_FSUB)] = vfp_double_fsub,
|
|
[FOP_TO_IDX(FOP_FDIV)] = vfp_double_fdiv,
|
|
};
|
|
|
|
#define FREG_BANK(x) ((x) & 0x0c)
|
|
#define FREG_IDX(x) ((x) & 3)
|
|
|
|
u32 vfp_double_cpdo(u32 inst, u32 fpscr)
|
|
{
|
|
u32 op = inst & FOP_MASK;
|
|
u32 exceptions = 0;
|
|
unsigned int dd = vfp_get_sd(inst);
|
|
unsigned int dn = vfp_get_sn(inst);
|
|
unsigned int dm = vfp_get_sm(inst);
|
|
unsigned int vecitr, veclen, vecstride;
|
|
u32 (*fop)(int, int, s32, u32);
|
|
|
|
veclen = fpscr & FPSCR_LENGTH_MASK;
|
|
vecstride = (1 + ((fpscr & FPSCR_STRIDE_MASK) == FPSCR_STRIDE_MASK)) * 2;
|
|
|
|
/*
|
|
* If destination bank is zero, vector length is always '1'.
|
|
* ARM DDI0100F C5.1.3, C5.3.2.
|
|
*/
|
|
if (FREG_BANK(dd) == 0)
|
|
veclen = 0;
|
|
|
|
pr_debug("VFP: vecstride=%u veclen=%u\n", vecstride,
|
|
(veclen >> FPSCR_LENGTH_BIT) + 1);
|
|
|
|
fop = (op == FOP_EXT) ? fop_extfns[dn] : fop_fns[FOP_TO_IDX(op)];
|
|
if (!fop)
|
|
goto invalid;
|
|
|
|
for (vecitr = 0; vecitr <= veclen; vecitr += 1 << FPSCR_LENGTH_BIT) {
|
|
u32 except;
|
|
|
|
if (op == FOP_EXT)
|
|
pr_debug("VFP: itr%d (d%u.%u) = op[%u] (d%u.%u)\n",
|
|
vecitr >> FPSCR_LENGTH_BIT,
|
|
dd >> 1, dd & 1, dn,
|
|
dm >> 1, dm & 1);
|
|
else
|
|
pr_debug("VFP: itr%d (d%u.%u) = (d%u.%u) op[%u] (d%u.%u)\n",
|
|
vecitr >> FPSCR_LENGTH_BIT,
|
|
dd >> 1, dd & 1,
|
|
dn >> 1, dn & 1,
|
|
FOP_TO_IDX(op),
|
|
dm >> 1, dm & 1);
|
|
|
|
except = fop(dd, dn, dm, fpscr);
|
|
pr_debug("VFP: itr%d: exceptions=%08x\n",
|
|
vecitr >> FPSCR_LENGTH_BIT, except);
|
|
|
|
exceptions |= except;
|
|
|
|
/*
|
|
* This ensures that comparisons only operate on scalars;
|
|
* comparisons always return with one FPSCR status bit set.
|
|
*/
|
|
if (except & (FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V))
|
|
break;
|
|
|
|
/*
|
|
* CHECK: It appears to be undefined whether we stop when
|
|
* we encounter an exception. We continue.
|
|
*/
|
|
|
|
dd = FREG_BANK(dd) + ((FREG_IDX(dd) + vecstride) & 6);
|
|
dn = FREG_BANK(dn) + ((FREG_IDX(dn) + vecstride) & 6);
|
|
if (FREG_BANK(dm) != 0)
|
|
dm = FREG_BANK(dm) + ((FREG_IDX(dm) + vecstride) & 6);
|
|
}
|
|
return exceptions;
|
|
|
|
invalid:
|
|
return ~0;
|
|
}
|