forked from Minki/linux
5e04f9201c
drivers/media/tuners/max2165.c:164:5: warning: no previous prototype for 'fixpt_div32' [-Wmissing-prototypes] Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
434 lines
10 KiB
C
434 lines
10 KiB
C
/*
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* Driver for Maxim MAX2165 silicon tuner
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*
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* Copyright (c) 2009 David T. L. Wong <davidtlwong@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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*
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/videodev2.h>
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#include <linux/delay.h>
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#include <linux/dvb/frontend.h>
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#include <linux/i2c.h>
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#include <linux/slab.h>
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#include "dvb_frontend.h"
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#include "max2165.h"
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#include "max2165_priv.h"
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#include "tuner-i2c.h"
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#define dprintk(args...) \
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do { \
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if (debug) \
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printk(KERN_DEBUG "max2165: " args); \
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} while (0)
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static int debug;
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module_param(debug, int, 0644);
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MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
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static int max2165_write_reg(struct max2165_priv *priv, u8 reg, u8 data)
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{
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int ret;
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u8 buf[] = { reg, data };
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struct i2c_msg msg = { .flags = 0, .buf = buf, .len = 2 };
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msg.addr = priv->config->i2c_address;
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if (debug >= 2)
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dprintk("%s: reg=0x%02X, data=0x%02X\n", __func__, reg, data);
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ret = i2c_transfer(priv->i2c, &msg, 1);
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if (ret != 1)
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dprintk("%s: error reg=0x%x, data=0x%x, ret=%i\n",
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__func__, reg, data, ret);
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return (ret != 1) ? -EIO : 0;
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}
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static int max2165_read_reg(struct max2165_priv *priv, u8 reg, u8 *p_data)
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{
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int ret;
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u8 dev_addr = priv->config->i2c_address;
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u8 b0[] = { reg };
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u8 b1[] = { 0 };
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struct i2c_msg msg[] = {
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{ .addr = dev_addr, .flags = 0, .buf = b0, .len = 1 },
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{ .addr = dev_addr, .flags = I2C_M_RD, .buf = b1, .len = 1 },
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};
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ret = i2c_transfer(priv->i2c, msg, 2);
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if (ret != 2) {
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dprintk("%s: error reg=0x%x, ret=%i\n", __func__, reg, ret);
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return -EIO;
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}
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*p_data = b1[0];
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if (debug >= 2)
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dprintk("%s: reg=0x%02X, data=0x%02X\n",
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__func__, reg, b1[0]);
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return 0;
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}
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static int max2165_mask_write_reg(struct max2165_priv *priv, u8 reg,
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u8 mask, u8 data)
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{
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int ret;
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u8 v;
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data &= mask;
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ret = max2165_read_reg(priv, reg, &v);
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if (ret != 0)
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return ret;
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v &= ~mask;
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v |= data;
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ret = max2165_write_reg(priv, reg, v);
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return ret;
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}
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static int max2165_read_rom_table(struct max2165_priv *priv)
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{
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u8 dat[3];
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int i;
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for (i = 0; i < 3; i++) {
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max2165_write_reg(priv, REG_ROM_TABLE_ADDR, i + 1);
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max2165_read_reg(priv, REG_ROM_TABLE_DATA, &dat[i]);
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}
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priv->tf_ntch_low_cfg = dat[0] >> 4;
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priv->tf_ntch_hi_cfg = dat[0] & 0x0F;
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priv->tf_balun_low_ref = dat[1] & 0x0F;
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priv->tf_balun_hi_ref = dat[1] >> 4;
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priv->bb_filter_7mhz_cfg = dat[2] & 0x0F;
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priv->bb_filter_8mhz_cfg = dat[2] >> 4;
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dprintk("tf_ntch_low_cfg = 0x%X\n", priv->tf_ntch_low_cfg);
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dprintk("tf_ntch_hi_cfg = 0x%X\n", priv->tf_ntch_hi_cfg);
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dprintk("tf_balun_low_ref = 0x%X\n", priv->tf_balun_low_ref);
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dprintk("tf_balun_hi_ref = 0x%X\n", priv->tf_balun_hi_ref);
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dprintk("bb_filter_7mhz_cfg = 0x%X\n", priv->bb_filter_7mhz_cfg);
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dprintk("bb_filter_8mhz_cfg = 0x%X\n", priv->bb_filter_8mhz_cfg);
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return 0;
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}
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static int max2165_set_osc(struct max2165_priv *priv, u8 osc /*MHz*/)
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{
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u8 v;
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v = (osc / 2);
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if (v == 2)
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v = 0x7;
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else
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v -= 8;
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max2165_mask_write_reg(priv, REG_PLL_CFG, 0x07, v);
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return 0;
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}
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static int max2165_set_bandwidth(struct max2165_priv *priv, u32 bw)
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{
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u8 val;
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if (bw == 8000000)
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val = priv->bb_filter_8mhz_cfg;
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else
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val = priv->bb_filter_7mhz_cfg;
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max2165_mask_write_reg(priv, REG_BASEBAND_CTRL, 0xF0, val << 4);
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return 0;
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}
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static int fixpt_div32(u32 dividend, u32 divisor, u32 *quotient, u32 *fraction)
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{
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u32 remainder;
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u32 q, f = 0;
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int i;
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if (0 == divisor)
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return -EINVAL;
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q = dividend / divisor;
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remainder = dividend - q * divisor;
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for (i = 0; i < 31; i++) {
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remainder <<= 1;
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if (remainder >= divisor) {
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f += 1;
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remainder -= divisor;
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}
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f <<= 1;
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}
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*quotient = q;
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*fraction = f;
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return 0;
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}
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static int max2165_set_rf(struct max2165_priv *priv, u32 freq)
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{
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u8 tf;
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u8 tf_ntch;
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u32 t;
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u32 quotient, fraction;
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int ret;
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/* Set PLL divider according to RF frequency */
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ret = fixpt_div32(freq / 1000, priv->config->osc_clk * 1000,
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"ient, &fraction);
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if (ret != 0)
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return ret;
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/* 20-bit fraction */
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fraction >>= 12;
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max2165_write_reg(priv, REG_NDIV_INT, quotient);
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max2165_mask_write_reg(priv, REG_NDIV_FRAC2, 0x0F, fraction >> 16);
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max2165_write_reg(priv, REG_NDIV_FRAC1, fraction >> 8);
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max2165_write_reg(priv, REG_NDIV_FRAC0, fraction);
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/* Norch Filter */
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tf_ntch = (freq < 725000000) ?
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priv->tf_ntch_low_cfg : priv->tf_ntch_hi_cfg;
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/* Tracking filter balun */
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t = priv->tf_balun_low_ref;
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t += (priv->tf_balun_hi_ref - priv->tf_balun_low_ref)
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* (freq / 1000 - 470000) / (780000 - 470000);
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tf = t;
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dprintk("tf = %X\n", tf);
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tf |= tf_ntch << 4;
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max2165_write_reg(priv, REG_TRACK_FILTER, tf);
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return 0;
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}
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static void max2165_debug_status(struct max2165_priv *priv)
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{
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u8 status, autotune;
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u8 auto_vco_success, auto_vco_active;
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u8 pll_locked;
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u8 dc_offset_low, dc_offset_hi;
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u8 signal_lv_over_threshold;
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u8 vco, vco_sub_band, adc;
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max2165_read_reg(priv, REG_STATUS, &status);
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max2165_read_reg(priv, REG_AUTOTUNE, &autotune);
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auto_vco_success = (status >> 6) & 0x01;
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auto_vco_active = (status >> 5) & 0x01;
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pll_locked = (status >> 4) & 0x01;
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dc_offset_low = (status >> 3) & 0x01;
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dc_offset_hi = (status >> 2) & 0x01;
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signal_lv_over_threshold = status & 0x01;
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vco = autotune >> 6;
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vco_sub_band = (autotune >> 3) & 0x7;
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adc = autotune & 0x7;
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dprintk("auto VCO active: %d, auto VCO success: %d\n",
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auto_vco_active, auto_vco_success);
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dprintk("PLL locked: %d\n", pll_locked);
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dprintk("DC offset low: %d, DC offset high: %d\n",
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dc_offset_low, dc_offset_hi);
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dprintk("Signal lvl over threshold: %d\n", signal_lv_over_threshold);
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dprintk("VCO: %d, VCO Sub-band: %d, ADC: %d\n", vco, vco_sub_band, adc);
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}
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static int max2165_set_params(struct dvb_frontend *fe)
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{
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struct max2165_priv *priv = fe->tuner_priv;
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struct dtv_frontend_properties *c = &fe->dtv_property_cache;
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int ret;
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switch (c->bandwidth_hz) {
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case 7000000:
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case 8000000:
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priv->frequency = c->frequency;
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break;
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default:
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printk(KERN_INFO "MAX2165: bandwidth %d Hz not supported.\n",
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c->bandwidth_hz);
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return -EINVAL;
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}
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dprintk("%s() frequency=%d\n", __func__, c->frequency);
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1);
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max2165_set_bandwidth(priv, c->bandwidth_hz);
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ret = max2165_set_rf(priv, priv->frequency);
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mdelay(50);
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max2165_debug_status(priv);
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0);
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if (ret != 0)
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return -EREMOTEIO;
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return 0;
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}
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static int max2165_get_frequency(struct dvb_frontend *fe, u32 *freq)
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{
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struct max2165_priv *priv = fe->tuner_priv;
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dprintk("%s()\n", __func__);
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*freq = priv->frequency;
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return 0;
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}
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static int max2165_get_bandwidth(struct dvb_frontend *fe, u32 *bw)
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{
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struct max2165_priv *priv = fe->tuner_priv;
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dprintk("%s()\n", __func__);
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*bw = priv->bandwidth;
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return 0;
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}
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static int max2165_get_status(struct dvb_frontend *fe, u32 *status)
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{
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struct max2165_priv *priv = fe->tuner_priv;
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u16 lock_status = 0;
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dprintk("%s()\n", __func__);
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1);
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max2165_debug_status(priv);
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*status = lock_status;
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0);
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return 0;
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}
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static int max2165_sleep(struct dvb_frontend *fe)
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{
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dprintk("%s()\n", __func__);
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return 0;
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}
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static int max2165_init(struct dvb_frontend *fe)
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{
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struct max2165_priv *priv = fe->tuner_priv;
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dprintk("%s()\n", __func__);
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1);
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/* Setup initial values */
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/* Fractional Mode on */
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max2165_write_reg(priv, REG_NDIV_FRAC2, 0x18);
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/* LNA on */
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max2165_write_reg(priv, REG_LNA, 0x01);
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max2165_write_reg(priv, REG_PLL_CFG, 0x7A);
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max2165_write_reg(priv, REG_TEST, 0x08);
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max2165_write_reg(priv, REG_SHUTDOWN, 0x40);
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max2165_write_reg(priv, REG_VCO_CTRL, 0x84);
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max2165_write_reg(priv, REG_BASEBAND_CTRL, 0xC3);
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max2165_write_reg(priv, REG_DC_OFFSET_CTRL, 0x75);
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max2165_write_reg(priv, REG_DC_OFFSET_DAC, 0x00);
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max2165_write_reg(priv, REG_ROM_TABLE_ADDR, 0x00);
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max2165_set_osc(priv, priv->config->osc_clk);
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max2165_read_rom_table(priv);
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max2165_set_bandwidth(priv, 8000000);
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0);
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return 0;
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}
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static int max2165_release(struct dvb_frontend *fe)
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{
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struct max2165_priv *priv = fe->tuner_priv;
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dprintk("%s()\n", __func__);
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kfree(priv);
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fe->tuner_priv = NULL;
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return 0;
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}
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static const struct dvb_tuner_ops max2165_tuner_ops = {
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.info = {
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.name = "Maxim MAX2165",
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.frequency_min = 470000000,
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.frequency_max = 780000000,
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.frequency_step = 50000,
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},
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.release = max2165_release,
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.init = max2165_init,
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.sleep = max2165_sleep,
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.set_params = max2165_set_params,
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.set_analog_params = NULL,
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.get_frequency = max2165_get_frequency,
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.get_bandwidth = max2165_get_bandwidth,
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.get_status = max2165_get_status
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};
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struct dvb_frontend *max2165_attach(struct dvb_frontend *fe,
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struct i2c_adapter *i2c,
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struct max2165_config *cfg)
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{
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struct max2165_priv *priv = NULL;
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dprintk("%s(%d-%04x)\n", __func__,
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i2c ? i2c_adapter_id(i2c) : -1,
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cfg ? cfg->i2c_address : -1);
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priv = kzalloc(sizeof(struct max2165_priv), GFP_KERNEL);
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if (priv == NULL)
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return NULL;
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memcpy(&fe->ops.tuner_ops, &max2165_tuner_ops,
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sizeof(struct dvb_tuner_ops));
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priv->config = cfg;
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priv->i2c = i2c;
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fe->tuner_priv = priv;
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max2165_init(fe);
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max2165_debug_status(priv);
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return fe;
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}
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EXPORT_SYMBOL(max2165_attach);
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MODULE_AUTHOR("David T. L. Wong <davidtlwong@gmail.com>");
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MODULE_DESCRIPTION("Maxim MAX2165 silicon tuner driver");
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MODULE_LICENSE("GPL");
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