forked from Minki/linux
816afe4ff9
We still patch SMP instructions to UP variants if we boot with a
single CPU, but not at any other time. In particular, not if we
unplug CPUs to return to a single cpu.
Paul McKenney points out:
mean offline overhead is 6251/48=130.2 milliseconds.
If I remove the alternatives_smp_switch() from the offline
path [...] the mean offline overhead is 550/42=13.1 milliseconds
Basically, we're never going to get those 120ms back, and the
code is pretty messy.
We get rid of:
1) The "smp-alt-once" boot option. It's actually "smp-alt-boot", the
documentation is wrong. It's now the default.
2) The skip_smp_alternatives flag used by suspend.
3) arch_disable_nonboot_cpus_begin() and arch_disable_nonboot_cpus_end()
which were only used to set this one flag.
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Cc: Paul McKenney <paul.mckenney@us.ibm.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/87vcgwwive.fsf@rustcorp.com.au
Signed-off-by: Ingo Molnar <mingo@kernel.org>
240 lines
8.3 KiB
C
240 lines
8.3 KiB
C
#ifndef _ASM_X86_ALTERNATIVE_H
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#define _ASM_X86_ALTERNATIVE_H
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#include <linux/types.h>
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#include <linux/stddef.h>
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#include <linux/stringify.h>
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#include <asm/asm.h>
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/*
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* Alternative inline assembly for SMP.
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*
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* The LOCK_PREFIX macro defined here replaces the LOCK and
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* LOCK_PREFIX macros used everywhere in the source tree.
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*
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* SMP alternatives use the same data structures as the other
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* alternatives and the X86_FEATURE_UP flag to indicate the case of a
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* UP system running a SMP kernel. The existing apply_alternatives()
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* works fine for patching a SMP kernel for UP.
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*
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* The SMP alternative tables can be kept after boot and contain both
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* UP and SMP versions of the instructions to allow switching back to
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* SMP at runtime, when hotplugging in a new CPU, which is especially
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* useful in virtualized environments.
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*
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* The very common lock prefix is handled as special case in a
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* separate table which is a pure address list without replacement ptr
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* and size information. That keeps the table sizes small.
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*/
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#ifdef CONFIG_SMP
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#define LOCK_PREFIX_HERE \
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".section .smp_locks,\"a\"\n" \
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".balign 4\n" \
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".long 671f - .\n" /* offset */ \
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".previous\n" \
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"671:"
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#define LOCK_PREFIX LOCK_PREFIX_HERE "\n\tlock; "
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#else /* ! CONFIG_SMP */
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#define LOCK_PREFIX_HERE ""
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#define LOCK_PREFIX ""
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#endif
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struct alt_instr {
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s32 instr_offset; /* original instruction */
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s32 repl_offset; /* offset to replacement instruction */
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u16 cpuid; /* cpuid bit set for replacement */
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u8 instrlen; /* length of original instruction */
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u8 replacementlen; /* length of new instruction, <= instrlen */
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};
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extern void alternative_instructions(void);
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extern void apply_alternatives(struct alt_instr *start, struct alt_instr *end);
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struct module;
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#ifdef CONFIG_SMP
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extern void alternatives_smp_module_add(struct module *mod, char *name,
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void *locks, void *locks_end,
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void *text, void *text_end);
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extern void alternatives_smp_module_del(struct module *mod);
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extern void alternatives_enable_smp(void);
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extern int alternatives_text_reserved(void *start, void *end);
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extern bool skip_smp_alternatives;
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#else
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static inline void alternatives_smp_module_add(struct module *mod, char *name,
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void *locks, void *locks_end,
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void *text, void *text_end) {}
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static inline void alternatives_smp_module_del(struct module *mod) {}
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static inline void alternatives_enable_smp(void) {}
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static inline int alternatives_text_reserved(void *start, void *end)
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{
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return 0;
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}
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#endif /* CONFIG_SMP */
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#define OLDINSTR(oldinstr) "661:\n\t" oldinstr "\n662:\n"
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#define b_replacement(number) "663"#number
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#define e_replacement(number) "664"#number
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#define alt_slen "662b-661b"
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#define alt_rlen(number) e_replacement(number)"f-"b_replacement(number)"f"
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#define ALTINSTR_ENTRY(feature, number) \
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" .long 661b - .\n" /* label */ \
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" .long " b_replacement(number)"f - .\n" /* new instruction */ \
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" .word " __stringify(feature) "\n" /* feature bit */ \
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" .byte " alt_slen "\n" /* source len */ \
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" .byte " alt_rlen(number) "\n" /* replacement len */
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#define DISCARD_ENTRY(number) /* rlen <= slen */ \
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" .byte 0xff + (" alt_rlen(number) ") - (" alt_slen ")\n"
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#define ALTINSTR_REPLACEMENT(newinstr, feature, number) /* replacement */ \
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b_replacement(number)":\n\t" newinstr "\n" e_replacement(number) ":\n\t"
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/* alternative assembly primitive: */
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#define ALTERNATIVE(oldinstr, newinstr, feature) \
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OLDINSTR(oldinstr) \
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".section .altinstructions,\"a\"\n" \
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ALTINSTR_ENTRY(feature, 1) \
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".previous\n" \
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".section .discard,\"aw\",@progbits\n" \
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DISCARD_ENTRY(1) \
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".previous\n" \
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".section .altinstr_replacement, \"ax\"\n" \
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ALTINSTR_REPLACEMENT(newinstr, feature, 1) \
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".previous"
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#define ALTERNATIVE_2(oldinstr, newinstr1, feature1, newinstr2, feature2)\
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OLDINSTR(oldinstr) \
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".section .altinstructions,\"a\"\n" \
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ALTINSTR_ENTRY(feature1, 1) \
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ALTINSTR_ENTRY(feature2, 2) \
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".previous\n" \
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".section .discard,\"aw\",@progbits\n" \
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DISCARD_ENTRY(1) \
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DISCARD_ENTRY(2) \
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".previous\n" \
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".section .altinstr_replacement, \"ax\"\n" \
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ALTINSTR_REPLACEMENT(newinstr1, feature1, 1) \
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ALTINSTR_REPLACEMENT(newinstr2, feature2, 2) \
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".previous"
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/*
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* This must be included *after* the definition of ALTERNATIVE due to
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* <asm/arch_hweight.h>
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*/
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#include <asm/cpufeature.h>
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/*
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* Alternative instructions for different CPU types or capabilities.
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*
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* This allows to use optimized instructions even on generic binary
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* kernels.
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*
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* length of oldinstr must be longer or equal the length of newinstr
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* It can be padded with nops as needed.
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*
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* For non barrier like inlines please define new variants
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* without volatile and memory clobber.
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*/
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#define alternative(oldinstr, newinstr, feature) \
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asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) : : : "memory")
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/*
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* Alternative inline assembly with input.
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*
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* Pecularities:
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* No memory clobber here.
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* Argument numbers start with 1.
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* Best is to use constraints that are fixed size (like (%1) ... "r")
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* If you use variable sized constraints like "m" or "g" in the
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* replacement make sure to pad to the worst case length.
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* Leaving an unused argument 0 to keep API compatibility.
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*/
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#define alternative_input(oldinstr, newinstr, feature, input...) \
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asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) \
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: : "i" (0), ## input)
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/* Like alternative_input, but with a single output argument */
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#define alternative_io(oldinstr, newinstr, feature, output, input...) \
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asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) \
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: output : "i" (0), ## input)
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/* Like alternative_io, but for replacing a direct call with another one. */
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#define alternative_call(oldfunc, newfunc, feature, output, input...) \
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asm volatile (ALTERNATIVE("call %P[old]", "call %P[new]", feature) \
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: output : [old] "i" (oldfunc), [new] "i" (newfunc), ## input)
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/*
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* Like alternative_call, but there are two features and respective functions.
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* If CPU has feature2, function2 is used.
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* Otherwise, if CPU has feature1, function1 is used.
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* Otherwise, old function is used.
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*/
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#define alternative_call_2(oldfunc, newfunc1, feature1, newfunc2, feature2, \
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output, input...) \
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asm volatile (ALTERNATIVE_2("call %P[old]", "call %P[new1]", feature1,\
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"call %P[new2]", feature2) \
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: output : [old] "i" (oldfunc), [new1] "i" (newfunc1), \
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[new2] "i" (newfunc2), ## input)
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/*
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* use this macro(s) if you need more than one output parameter
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* in alternative_io
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*/
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#define ASM_OUTPUT2(a...) a
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/*
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* use this macro if you need clobbers but no inputs in
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* alternative_{input,io,call}()
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*/
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#define ASM_NO_INPUT_CLOBBER(clbr...) "i" (0) : clbr
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struct paravirt_patch_site;
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#ifdef CONFIG_PARAVIRT
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void apply_paravirt(struct paravirt_patch_site *start,
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struct paravirt_patch_site *end);
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#else
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static inline void apply_paravirt(struct paravirt_patch_site *start,
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struct paravirt_patch_site *end)
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{}
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#define __parainstructions NULL
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#define __parainstructions_end NULL
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#endif
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extern void *text_poke_early(void *addr, const void *opcode, size_t len);
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/*
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* Clear and restore the kernel write-protection flag on the local CPU.
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* Allows the kernel to edit read-only pages.
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* Side-effect: any interrupt handler running between save and restore will have
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* the ability to write to read-only pages.
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*
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* Warning:
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* Code patching in the UP case is safe if NMIs and MCE handlers are stopped and
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* no thread can be preempted in the instructions being modified (no iret to an
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* invalid instruction possible) or if the instructions are changed from a
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* consistent state to another consistent state atomically.
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* More care must be taken when modifying code in the SMP case because of
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* Intel's errata. text_poke_smp() takes care that errata, but still
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* doesn't support NMI/MCE handler code modifying.
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* On the local CPU you need to be protected again NMI or MCE handlers seeing an
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* inconsistent instruction while you patch.
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*/
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struct text_poke_param {
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void *addr;
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const void *opcode;
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size_t len;
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};
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extern void *text_poke(void *addr, const void *opcode, size_t len);
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extern void *text_poke_smp(void *addr, const void *opcode, size_t len);
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extern void text_poke_smp_batch(struct text_poke_param *params, int n);
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#endif /* _ASM_X86_ALTERNATIVE_H */
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