forked from Minki/linux
d8f64797c5
Many of the Tegra DT binding documents say nothing about the clocks or clock-names properties, yet those are present and required in DT files. This patch simply updates the documentation file to match the implicit definition of the binding, based on real-world DT content. All Tegra bindings that mention clocks are updated to have consistent wording and formatting of the clock-related properties. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
21 lines
551 B
Plaintext
21 lines
551 B
Plaintext
Tegra SoC PWFM controller
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Required properties:
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- compatible: should be one of:
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- "nvidia,tegra20-pwm"
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- "nvidia,tegra30-pwm"
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- reg: physical base address and length of the controller's registers
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- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
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the cells format.
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- clocks: Must contain one entry, for the module clock.
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See ../clocks/clock-bindings.txt for details.
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Example:
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pwm: pwm@7000a000 {
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compatible = "nvidia,tegra20-pwm";
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reg = <0x7000a000 0x100>;
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#pwm-cells = <2>;
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clocks = <&tegra_car 17>;
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};
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