forked from Minki/linux
d8dc7fbd53
Re-implement the physical address space switching to be architecturally compliant. This involves flushing the caches, disabling the MMU, and only then updating the page tables. Once that is complete, the system can be brought back up again. Since we disable the MMU, we need to do the update in assembly code. Luckily, the entries which need updating are fairly trivial, and are all setup by the early assembly code. We can merely adjust each entry by the delta required. Not only does this fix the code to be architecturally compliant, but it fixes a couple of bugs too: 1. The original code would only ever update the first L2 entry covering a fraction of the kernel; the remainder were left untouched. 2. The L2 entries covering the DTB blob were likewise untouched. This solution fixes up all entries. Tested-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
104 lines
3.5 KiB
Makefile
104 lines
3.5 KiB
Makefile
#
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# Makefile for the linux arm-specific parts of the memory manager.
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#
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obj-y := dma-mapping.o extable.o fault.o init.o \
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iomap.o
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obj-$(CONFIG_MMU) += fault-armv.o flush.o idmap.o ioremap.o \
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mmap.o pgd.o mmu.o pageattr.o
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ifneq ($(CONFIG_MMU),y)
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obj-y += nommu.o
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endif
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obj-$(CONFIG_ARM_PTDUMP) += dump.o
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obj-$(CONFIG_MODULES) += proc-syms.o
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obj-$(CONFIG_ALIGNMENT_TRAP) += alignment.o
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obj-$(CONFIG_HIGHMEM) += highmem.o
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obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
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obj-$(CONFIG_ARM_PV_FIXUP) += pv-fixup-asm.o
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obj-$(CONFIG_CPU_ABRT_NOMMU) += abort-nommu.o
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obj-$(CONFIG_CPU_ABRT_EV4) += abort-ev4.o
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obj-$(CONFIG_CPU_ABRT_EV4T) += abort-ev4t.o
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obj-$(CONFIG_CPU_ABRT_LV4T) += abort-lv4t.o
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obj-$(CONFIG_CPU_ABRT_EV5T) += abort-ev5t.o
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obj-$(CONFIG_CPU_ABRT_EV5TJ) += abort-ev5tj.o
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obj-$(CONFIG_CPU_ABRT_EV6) += abort-ev6.o
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obj-$(CONFIG_CPU_ABRT_EV7) += abort-ev7.o
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AFLAGS_abort-ev6.o :=-Wa,-march=armv6k
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AFLAGS_abort-ev7.o :=-Wa,-march=armv7-a
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obj-$(CONFIG_CPU_PABRT_LEGACY) += pabort-legacy.o
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obj-$(CONFIG_CPU_PABRT_V6) += pabort-v6.o
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obj-$(CONFIG_CPU_PABRT_V7) += pabort-v7.o
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obj-$(CONFIG_CPU_CACHE_V4) += cache-v4.o
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obj-$(CONFIG_CPU_CACHE_V4WT) += cache-v4wt.o
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obj-$(CONFIG_CPU_CACHE_V4WB) += cache-v4wb.o
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obj-$(CONFIG_CPU_CACHE_V6) += cache-v6.o
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obj-$(CONFIG_CPU_CACHE_V7) += cache-v7.o
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obj-$(CONFIG_CPU_CACHE_FA) += cache-fa.o
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obj-$(CONFIG_CPU_CACHE_NOP) += cache-nop.o
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AFLAGS_cache-v6.o :=-Wa,-march=armv6
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AFLAGS_cache-v7.o :=-Wa,-march=armv7-a
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obj-$(CONFIG_CPU_COPY_V4WT) += copypage-v4wt.o
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obj-$(CONFIG_CPU_COPY_V4WB) += copypage-v4wb.o
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obj-$(CONFIG_CPU_COPY_FEROCEON) += copypage-feroceon.o
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obj-$(CONFIG_CPU_COPY_V6) += copypage-v6.o context.o
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obj-$(CONFIG_CPU_SA1100) += copypage-v4mc.o
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obj-$(CONFIG_CPU_XSCALE) += copypage-xscale.o
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obj-$(CONFIG_CPU_XSC3) += copypage-xsc3.o
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obj-$(CONFIG_CPU_COPY_FA) += copypage-fa.o
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obj-$(CONFIG_CPU_TLB_V4WT) += tlb-v4.o
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obj-$(CONFIG_CPU_TLB_V4WB) += tlb-v4wb.o
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obj-$(CONFIG_CPU_TLB_V4WBI) += tlb-v4wbi.o
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obj-$(CONFIG_CPU_TLB_FEROCEON) += tlb-v4wbi.o # reuse v4wbi TLB functions
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obj-$(CONFIG_CPU_TLB_V6) += tlb-v6.o
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obj-$(CONFIG_CPU_TLB_V7) += tlb-v7.o
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obj-$(CONFIG_CPU_TLB_FA) += tlb-fa.o
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AFLAGS_tlb-v6.o :=-Wa,-march=armv6
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AFLAGS_tlb-v7.o :=-Wa,-march=armv7-a
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obj-$(CONFIG_CPU_ARM7TDMI) += proc-arm7tdmi.o
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obj-$(CONFIG_CPU_ARM720T) += proc-arm720.o
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obj-$(CONFIG_CPU_ARM740T) += proc-arm740.o
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obj-$(CONFIG_CPU_ARM9TDMI) += proc-arm9tdmi.o
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obj-$(CONFIG_CPU_ARM920T) += proc-arm920.o
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obj-$(CONFIG_CPU_ARM922T) += proc-arm922.o
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obj-$(CONFIG_CPU_ARM925T) += proc-arm925.o
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obj-$(CONFIG_CPU_ARM926T) += proc-arm926.o
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obj-$(CONFIG_CPU_ARM940T) += proc-arm940.o
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obj-$(CONFIG_CPU_ARM946E) += proc-arm946.o
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obj-$(CONFIG_CPU_FA526) += proc-fa526.o
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obj-$(CONFIG_CPU_ARM1020) += proc-arm1020.o
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obj-$(CONFIG_CPU_ARM1020E) += proc-arm1020e.o
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obj-$(CONFIG_CPU_ARM1022) += proc-arm1022.o
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obj-$(CONFIG_CPU_ARM1026) += proc-arm1026.o
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obj-$(CONFIG_CPU_SA110) += proc-sa110.o
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obj-$(CONFIG_CPU_SA1100) += proc-sa1100.o
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obj-$(CONFIG_CPU_XSCALE) += proc-xscale.o
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obj-$(CONFIG_CPU_XSC3) += proc-xsc3.o
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obj-$(CONFIG_CPU_MOHAWK) += proc-mohawk.o
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obj-$(CONFIG_CPU_FEROCEON) += proc-feroceon.o
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obj-$(CONFIG_CPU_V6) += proc-v6.o
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obj-$(CONFIG_CPU_V6K) += proc-v6.o
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obj-$(CONFIG_CPU_V7) += proc-v7.o
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obj-$(CONFIG_CPU_V7M) += proc-v7m.o
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AFLAGS_proc-v6.o :=-Wa,-march=armv6
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AFLAGS_proc-v7.o :=-Wa,-march=armv7-a
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obj-$(CONFIG_OUTER_CACHE) += l2c-common.o
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obj-$(CONFIG_CACHE_FEROCEON_L2) += cache-feroceon-l2.o
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obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o l2c-l2x0-resume.o
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obj-$(CONFIG_CACHE_XSC3L2) += cache-xsc3l2.o
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obj-$(CONFIG_CACHE_TAUROS2) += cache-tauros2.o
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