d865ca6c14
* This patch fixes a bug in calculating the scaled power for three chain chipsets. * Also, a delay is needed after setting DAC low-power mode in TOP1 RF register (Top Level Register Bits). Signed-off-by: Senthil Balasubramanian <senthilkumar@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com> |
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.. | ||
ar9170 | ||
ath5k | ||
ath9k | ||
ath.h | ||
Kconfig | ||
main.c | ||
Makefile | ||
regd_common.h | ||
regd.c | ||
regd.h |