forked from Minki/linux
1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
484 lines
12 KiB
C
484 lines
12 KiB
C
/*
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* Helpfile for sonic.c
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*
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* (C) Waldorf Electronics, Germany
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* Written by Andreas Busse
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*
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* NOTE: most of the structure definitions here are endian dependent.
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* If you want to use this driver on big endian machines, the data
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* and pad structure members must be exchanged. Also, the structures
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* need to be changed accordingly to the bus size.
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*
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* 981229 MSch: did just that for the 68k Mac port (32 bit, big endian),
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* see CONFIG_MACSONIC branch below.
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*
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*/
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#ifndef SONIC_H
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#define SONIC_H
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#include <linux/config.h>
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/*
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* SONIC register offsets
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*/
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#define SONIC_CMD 0x00
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#define SONIC_DCR 0x01
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#define SONIC_RCR 0x02
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#define SONIC_TCR 0x03
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#define SONIC_IMR 0x04
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#define SONIC_ISR 0x05
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#define SONIC_UTDA 0x06
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#define SONIC_CTDA 0x07
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#define SONIC_URDA 0x0d
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#define SONIC_CRDA 0x0e
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#define SONIC_EOBC 0x13
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#define SONIC_URRA 0x14
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#define SONIC_RSA 0x15
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#define SONIC_REA 0x16
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#define SONIC_RRP 0x17
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#define SONIC_RWP 0x18
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#define SONIC_RSC 0x2b
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#define SONIC_CEP 0x21
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#define SONIC_CAP2 0x22
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#define SONIC_CAP1 0x23
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#define SONIC_CAP0 0x24
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#define SONIC_CE 0x25
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#define SONIC_CDP 0x26
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#define SONIC_CDC 0x27
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#define SONIC_WT0 0x29
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#define SONIC_WT1 0x2a
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#define SONIC_SR 0x28
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/* test-only registers */
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#define SONIC_TPS 0x08
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#define SONIC_TFC 0x09
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#define SONIC_TSA0 0x0a
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#define SONIC_TSA1 0x0b
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#define SONIC_TFS 0x0c
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#define SONIC_CRBA0 0x0f
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#define SONIC_CRBA1 0x10
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#define SONIC_RBWC0 0x11
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#define SONIC_RBWC1 0x12
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#define SONIC_TTDA 0x20
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#define SONIC_MDT 0x2f
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#define SONIC_TRBA0 0x19
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#define SONIC_TRBA1 0x1a
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#define SONIC_TBWC0 0x1b
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#define SONIC_TBWC1 0x1c
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#define SONIC_LLFA 0x1f
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#define SONIC_ADDR0 0x1d
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#define SONIC_ADDR1 0x1e
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/*
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* Error counters
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*/
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#define SONIC_CRCT 0x2c
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#define SONIC_FAET 0x2d
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#define SONIC_MPT 0x2e
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#define SONIC_DCR2 0x3f
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/*
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* SONIC command bits
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*/
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#define SONIC_CR_LCAM 0x0200
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#define SONIC_CR_RRRA 0x0100
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#define SONIC_CR_RST 0x0080
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#define SONIC_CR_ST 0x0020
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#define SONIC_CR_STP 0x0010
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#define SONIC_CR_RXEN 0x0008
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#define SONIC_CR_RXDIS 0x0004
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#define SONIC_CR_TXP 0x0002
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#define SONIC_CR_HTX 0x0001
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/*
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* SONIC data configuration bits
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*/
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#define SONIC_DCR_EXBUS 0x8000
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#define SONIC_DCR_LBR 0x2000
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#define SONIC_DCR_PO1 0x1000
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#define SONIC_DCR_PO0 0x0800
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#define SONIC_DCR_SBUS 0x0400
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#define SONIC_DCR_USR1 0x0200
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#define SONIC_DCR_USR0 0x0100
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#define SONIC_DCR_WC1 0x0080
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#define SONIC_DCR_WC0 0x0040
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#define SONIC_DCR_DW 0x0020
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#define SONIC_DCR_BMS 0x0010
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#define SONIC_DCR_RFT1 0x0008
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#define SONIC_DCR_RFT0 0x0004
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#define SONIC_DCR_TFT1 0x0002
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#define SONIC_DCR_TFT0 0x0001
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/*
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* Constants for the SONIC receive control register.
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*/
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#define SONIC_RCR_ERR 0x8000
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#define SONIC_RCR_RNT 0x4000
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#define SONIC_RCR_BRD 0x2000
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#define SONIC_RCR_PRO 0x1000
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#define SONIC_RCR_AMC 0x0800
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#define SONIC_RCR_LB1 0x0400
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#define SONIC_RCR_LB0 0x0200
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#define SONIC_RCR_MC 0x0100
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#define SONIC_RCR_BC 0x0080
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#define SONIC_RCR_LPKT 0x0040
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#define SONIC_RCR_CRS 0x0020
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#define SONIC_RCR_COL 0x0010
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#define SONIC_RCR_CRCR 0x0008
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#define SONIC_RCR_FAER 0x0004
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#define SONIC_RCR_LBK 0x0002
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#define SONIC_RCR_PRX 0x0001
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#define SONIC_RCR_LB_OFF 0
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#define SONIC_RCR_LB_MAC SONIC_RCR_LB0
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#define SONIC_RCR_LB_ENDEC SONIC_RCR_LB1
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#define SONIC_RCR_LB_TRANS (SONIC_RCR_LB0 | SONIC_RCR_LB1)
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/* default RCR setup */
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#define SONIC_RCR_DEFAULT (SONIC_RCR_BRD)
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/*
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* SONIC Transmit Control register bits
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*/
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#define SONIC_TCR_PINTR 0x8000
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#define SONIC_TCR_POWC 0x4000
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#define SONIC_TCR_CRCI 0x2000
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#define SONIC_TCR_EXDIS 0x1000
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#define SONIC_TCR_EXD 0x0400
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#define SONIC_TCR_DEF 0x0200
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#define SONIC_TCR_NCRS 0x0100
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#define SONIC_TCR_CRLS 0x0080
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#define SONIC_TCR_EXC 0x0040
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#define SONIC_TCR_PMB 0x0008
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#define SONIC_TCR_FU 0x0004
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#define SONIC_TCR_BCM 0x0002
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#define SONIC_TCR_PTX 0x0001
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#define SONIC_TCR_DEFAULT 0x0000
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/*
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* Constants for the SONIC_INTERRUPT_MASK and
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* SONIC_INTERRUPT_STATUS registers.
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*/
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#define SONIC_INT_BR 0x4000
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#define SONIC_INT_HBL 0x2000
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#define SONIC_INT_LCD 0x1000
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#define SONIC_INT_PINT 0x0800
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#define SONIC_INT_PKTRX 0x0400
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#define SONIC_INT_TXDN 0x0200
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#define SONIC_INT_TXER 0x0100
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#define SONIC_INT_TC 0x0080
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#define SONIC_INT_RDE 0x0040
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#define SONIC_INT_RBE 0x0020
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#define SONIC_INT_RBAE 0x0010
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#define SONIC_INT_CRC 0x0008
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#define SONIC_INT_FAE 0x0004
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#define SONIC_INT_MP 0x0002
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#define SONIC_INT_RFO 0x0001
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/*
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* The interrupts we allow.
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*/
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#define SONIC_IMR_DEFAULT (SONIC_INT_BR | \
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SONIC_INT_LCD | \
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SONIC_INT_PINT | \
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SONIC_INT_PKTRX | \
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SONIC_INT_TXDN | \
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SONIC_INT_TXER | \
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SONIC_INT_RDE | \
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SONIC_INT_RBE | \
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SONIC_INT_RBAE | \
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SONIC_INT_CRC | \
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SONIC_INT_FAE | \
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SONIC_INT_MP)
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#define SONIC_END_OF_LINKS 0x0001
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#ifdef CONFIG_MACSONIC
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/*
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* Big endian like structures on 680x0 Macs
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*/
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typedef struct {
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u32 rx_bufadr_l; /* receive buffer ptr */
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u32 rx_bufadr_h;
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u32 rx_bufsize_l; /* no. of words in the receive buffer */
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u32 rx_bufsize_h;
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} sonic_rr_t;
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/*
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* Sonic receive descriptor. Receive descriptors are
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* kept in a linked list of these structures.
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*/
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typedef struct {
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SREGS_PAD(pad0);
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u16 rx_status; /* status after reception of a packet */
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SREGS_PAD(pad1);
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u16 rx_pktlen; /* length of the packet incl. CRC */
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/*
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* Pointers to the location in the receive buffer area (RBA)
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* where the packet resides. A packet is always received into
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* a contiguous piece of memory.
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*/
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SREGS_PAD(pad2);
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u16 rx_pktptr_l;
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SREGS_PAD(pad3);
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u16 rx_pktptr_h;
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SREGS_PAD(pad4);
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u16 rx_seqno; /* sequence no. */
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SREGS_PAD(pad5);
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u16 link; /* link to next RDD (end if EOL bit set) */
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/*
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* Owner of this descriptor, 0= driver, 1=sonic
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*/
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SREGS_PAD(pad6);
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u16 in_use;
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caddr_t rda_next; /* pointer to next RD */
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} sonic_rd_t;
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/*
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* Describes a Transmit Descriptor
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*/
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typedef struct {
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SREGS_PAD(pad0);
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u16 tx_status; /* status after transmission of a packet */
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SREGS_PAD(pad1);
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u16 tx_config; /* transmit configuration for this packet */
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SREGS_PAD(pad2);
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u16 tx_pktsize; /* size of the packet to be transmitted */
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SREGS_PAD(pad3);
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u16 tx_frag_count; /* no. of fragments */
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SREGS_PAD(pad4);
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u16 tx_frag_ptr_l;
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SREGS_PAD(pad5);
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u16 tx_frag_ptr_h;
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SREGS_PAD(pad6);
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u16 tx_frag_size;
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SREGS_PAD(pad7);
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u16 link; /* ptr to next descriptor */
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} sonic_td_t;
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/*
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* Describes an entry in the CAM Descriptor Area.
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*/
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typedef struct {
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SREGS_PAD(pad0);
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u16 cam_entry_pointer;
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SREGS_PAD(pad1);
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u16 cam_cap0;
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SREGS_PAD(pad2);
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u16 cam_cap1;
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SREGS_PAD(pad3);
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u16 cam_cap2;
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} sonic_cd_t;
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#define CAM_DESCRIPTORS 16
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typedef struct {
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sonic_cd_t cam_desc[CAM_DESCRIPTORS];
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SREGS_PAD(pad);
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u16 cam_enable;
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} sonic_cda_t;
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#else /* original declarations, little endian 32 bit */
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/*
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* structure definitions
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*/
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typedef struct {
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u32 rx_bufadr_l; /* receive buffer ptr */
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u32 rx_bufadr_h;
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u32 rx_bufsize_l; /* no. of words in the receive buffer */
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u32 rx_bufsize_h;
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} sonic_rr_t;
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/*
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* Sonic receive descriptor. Receive descriptors are
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* kept in a linked list of these structures.
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*/
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typedef struct {
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u16 rx_status; /* status after reception of a packet */
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SREGS_PAD(pad0);
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u16 rx_pktlen; /* length of the packet incl. CRC */
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SREGS_PAD(pad1);
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/*
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* Pointers to the location in the receive buffer area (RBA)
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* where the packet resides. A packet is always received into
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* a contiguous piece of memory.
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*/
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u16 rx_pktptr_l;
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SREGS_PAD(pad2);
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u16 rx_pktptr_h;
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SREGS_PAD(pad3);
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u16 rx_seqno; /* sequence no. */
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SREGS_PAD(pad4);
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u16 link; /* link to next RDD (end if EOL bit set) */
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SREGS_PAD(pad5);
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/*
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* Owner of this descriptor, 0= driver, 1=sonic
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*/
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u16 in_use;
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SREGS_PAD(pad6);
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caddr_t rda_next; /* pointer to next RD */
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} sonic_rd_t;
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/*
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* Describes a Transmit Descriptor
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*/
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typedef struct {
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u16 tx_status; /* status after transmission of a packet */
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SREGS_PAD(pad0);
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u16 tx_config; /* transmit configuration for this packet */
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SREGS_PAD(pad1);
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u16 tx_pktsize; /* size of the packet to be transmitted */
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SREGS_PAD(pad2);
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u16 tx_frag_count; /* no. of fragments */
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SREGS_PAD(pad3);
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u16 tx_frag_ptr_l;
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SREGS_PAD(pad4);
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u16 tx_frag_ptr_h;
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SREGS_PAD(pad5);
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u16 tx_frag_size;
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SREGS_PAD(pad6);
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u16 link; /* ptr to next descriptor */
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SREGS_PAD(pad7);
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} sonic_td_t;
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/*
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* Describes an entry in the CAM Descriptor Area.
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*/
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typedef struct {
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u16 cam_entry_pointer;
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SREGS_PAD(pad0);
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u16 cam_cap0;
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SREGS_PAD(pad1);
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u16 cam_cap1;
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SREGS_PAD(pad2);
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u16 cam_cap2;
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SREGS_PAD(pad3);
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} sonic_cd_t;
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#define CAM_DESCRIPTORS 16
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typedef struct {
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sonic_cd_t cam_desc[CAM_DESCRIPTORS];
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u16 cam_enable;
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SREGS_PAD(pad);
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} sonic_cda_t;
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#endif /* endianness */
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/*
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* Some tunables for the buffer areas. Power of 2 is required
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* the current driver uses one receive buffer for each descriptor.
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*
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* MSch: use more buffer space for the slow m68k Macs!
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*/
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#ifdef CONFIG_MACSONIC
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#define SONIC_NUM_RRS 32 /* number of receive resources */
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#define SONIC_NUM_RDS SONIC_NUM_RRS /* number of receive descriptors */
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#define SONIC_NUM_TDS 32 /* number of transmit descriptors */
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#else
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#define SONIC_NUM_RRS 16 /* number of receive resources */
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#define SONIC_NUM_RDS SONIC_NUM_RRS /* number of receive descriptors */
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#define SONIC_NUM_TDS 16 /* number of transmit descriptors */
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#endif
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#define SONIC_RBSIZE 1520 /* size of one resource buffer */
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#define SONIC_RDS_MASK (SONIC_NUM_RDS-1)
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#define SONIC_TDS_MASK (SONIC_NUM_TDS-1)
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/* Information that need to be kept for each board. */
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struct sonic_local {
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sonic_cda_t cda; /* virtual CPU address of CDA */
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sonic_td_t tda[SONIC_NUM_TDS]; /* transmit descriptor area */
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sonic_rr_t rra[SONIC_NUM_RRS]; /* receive resource area */
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sonic_rd_t rda[SONIC_NUM_RDS]; /* receive descriptor area */
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struct sk_buff *tx_skb[SONIC_NUM_TDS]; /* skbuffs for packets to transmit */
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unsigned int tx_laddr[SONIC_NUM_TDS]; /* logical DMA address fro skbuffs */
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unsigned char *rba; /* start of receive buffer areas */
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unsigned int cda_laddr; /* logical DMA address of CDA */
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unsigned int tda_laddr; /* logical DMA address of TDA */
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unsigned int rra_laddr; /* logical DMA address of RRA */
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unsigned int rda_laddr; /* logical DMA address of RDA */
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unsigned int rba_laddr; /* logical DMA address of RBA */
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unsigned int cur_rra; /* current indexes to resource areas */
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unsigned int cur_rx;
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unsigned int cur_tx;
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unsigned int dirty_tx; /* last unacked transmit packet */
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char tx_full;
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struct net_device_stats stats;
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};
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#define TX_TIMEOUT 6
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/* Index to functions, as function prototypes. */
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static int sonic_open(struct net_device *dev);
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static int sonic_send_packet(struct sk_buff *skb, struct net_device *dev);
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static irqreturn_t sonic_interrupt(int irq, void *dev_id, struct pt_regs *regs);
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static void sonic_rx(struct net_device *dev);
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static int sonic_close(struct net_device *dev);
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static struct net_device_stats *sonic_get_stats(struct net_device *dev);
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static void sonic_multicast_list(struct net_device *dev);
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static int sonic_init(struct net_device *dev);
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static void sonic_tx_timeout(struct net_device *dev);
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static const char *version =
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"sonic.c:v0.92 20.9.98 tsbogend@alpha.franken.de\n";
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#endif /* SONIC_H */
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