forked from Minki/linux
dcfb748422
The WDIOC_SETTIMEOUT argument is supposed to be a "seconds" value. However, the book E wdt currently treats it as a "period" which is interpreted in a board-specific way. This patch allows the user to pass in a "seconds" value and the driver will set the smallest timeout that is at least as large as specified by the user. It's been tested on e500 hardware and works as expected. The patch only modifies the CONFIG_FSL_BOOKE case, the CONFIG_4xx case is left unmodified as I don't have any hardware to test it on. Signed-off-by: Chris Friesen <cfriesen@nortel.com> Cc: Kumar Gala <galak@gate.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
241 lines
6.0 KiB
C
241 lines
6.0 KiB
C
/*
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* Watchdog timer for PowerPC Book-E systems
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*
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* Author: Matthew McClintock
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* Maintainer: Kumar Gala <galak@kernel.crashing.org>
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*
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* Copyright 2005, 2008 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/module.h>
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#include <linux/fs.h>
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#include <linux/smp.h>
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#include <linux/miscdevice.h>
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#include <linux/notifier.h>
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#include <linux/watchdog.h>
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#include <linux/uaccess.h>
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#include <asm/reg_booke.h>
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#include <asm/system.h>
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#include <asm/time.h>
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#include <asm/div64.h>
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/* If the kernel parameter wdt=1, the watchdog will be enabled at boot.
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* Also, the wdt_period sets the watchdog timer period timeout.
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* For E500 cpus the wdt_period sets which bit changing from 0->1 will
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* trigger a watchog timeout. This watchdog timeout will occur 3 times, the
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* first time nothing will happen, the second time a watchdog exception will
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* occur, and the final time the board will reset.
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*/
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#ifdef CONFIG_FSL_BOOKE
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#define WDT_PERIOD_DEFAULT 38 /* Ex. wdt_period=28 bus=333Mhz,reset=~40sec */
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#else
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#define WDT_PERIOD_DEFAULT 3 /* Refer to the PPC40x and PPC4xx manuals */
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#endif /* for timing information */
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u32 booke_wdt_enabled;
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u32 booke_wdt_period = WDT_PERIOD_DEFAULT;
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#ifdef CONFIG_FSL_BOOKE
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#define WDTP(x) ((((x)&0x3)<<30)|(((x)&0x3c)<<15))
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#define WDTP_MASK (WDTP(0))
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#else
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#define WDTP(x) (TCR_WP(x))
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#define WDTP_MASK (TCR_WP_MASK)
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#endif
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static DEFINE_SPINLOCK(booke_wdt_lock);
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/* For the specified period, determine the number of seconds
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* corresponding to the reset time. There will be a watchdog
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* exception at approximately 3/5 of this time.
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*
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* The formula to calculate this is given by:
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* 2.5 * (2^(63-period+1)) / timebase_freq
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*
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* In order to simplify things, we assume that period is
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* at least 1. This will still result in a very long timeout.
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*/
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static unsigned long long period_to_sec(unsigned int period)
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{
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unsigned long long tmp = 1ULL << (64 - period);
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unsigned long tmp2 = ppc_tb_freq;
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/* tmp may be a very large number and we don't want to overflow,
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* so divide the timebase freq instead of multiplying tmp
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*/
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tmp2 = tmp2 / 5 * 2;
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do_div(tmp, tmp2);
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return tmp;
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}
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/*
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* This procedure will find the highest period which will give a timeout
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* greater than the one required. e.g. for a bus speed of 66666666 and
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* and a parameter of 2 secs, then this procedure will return a value of 38.
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*/
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static unsigned int sec_to_period(unsigned int secs)
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{
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unsigned int period;
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for (period = 63; period > 0; period--) {
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if (period_to_sec(period) >= secs)
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return period;
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}
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return 0;
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}
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static void __booke_wdt_ping(void *data)
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{
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mtspr(SPRN_TSR, TSR_ENW|TSR_WIS);
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}
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static void booke_wdt_ping(void)
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{
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on_each_cpu(__booke_wdt_ping, NULL, 0);
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}
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static void __booke_wdt_enable(void *data)
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{
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u32 val;
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/* clear status before enabling watchdog */
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__booke_wdt_ping(NULL);
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val = mfspr(SPRN_TCR);
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val &= ~WDTP_MASK;
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val |= (TCR_WIE|TCR_WRC(WRC_CHIP)|WDTP(booke_wdt_period));
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mtspr(SPRN_TCR, val);
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}
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static ssize_t booke_wdt_write(struct file *file, const char __user *buf,
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size_t count, loff_t *ppos)
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{
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booke_wdt_ping();
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return count;
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}
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static struct watchdog_info ident = {
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.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
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.identity = "PowerPC Book-E Watchdog",
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};
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static long booke_wdt_ioctl(struct file *file,
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unsigned int cmd, unsigned long arg)
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{
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u32 tmp = 0;
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u32 __user *p = (u32 __user *)arg;
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switch (cmd) {
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case WDIOC_GETSUPPORT:
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if (copy_to_user((void *)arg, &ident, sizeof(ident)))
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return -EFAULT;
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case WDIOC_GETSTATUS:
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return put_user(ident.options, p);
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case WDIOC_GETBOOTSTATUS:
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/* XXX: something is clearing TSR */
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tmp = mfspr(SPRN_TSR) & TSR_WRS(3);
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/* returns 1 if last reset was caused by the WDT */
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return (tmp ? 1 : 0);
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case WDIOC_SETOPTIONS:
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if (get_user(tmp, p))
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return -EINVAL;
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if (tmp == WDIOS_ENABLECARD) {
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booke_wdt_ping();
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break;
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} else
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return -EINVAL;
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return 0;
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case WDIOC_KEEPALIVE:
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booke_wdt_ping();
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return 0;
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case WDIOC_SETTIMEOUT:
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if (get_user(tmp, p))
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return -EFAULT;
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#ifdef CONFIG_FSL_BOOKE
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/* period of 1 gives the largest possible timeout */
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if (tmp > period_to_sec(1))
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return -EINVAL;
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booke_wdt_period = sec_to_period(tmp);
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#else
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booke_wdt_period = tmp;
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#endif
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mtspr(SPRN_TCR, (mfspr(SPRN_TCR) & ~WDTP_MASK) |
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WDTP(booke_wdt_period));
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return 0;
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case WDIOC_GETTIMEOUT:
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return put_user(booke_wdt_period, p);
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default:
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return -ENOTTY;
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}
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return 0;
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}
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static int booke_wdt_open(struct inode *inode, struct file *file)
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{
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spin_lock(&booke_wdt_lock);
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if (booke_wdt_enabled == 0) {
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booke_wdt_enabled = 1;
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on_each_cpu(__booke_wdt_enable, NULL, 0);
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printk(KERN_INFO
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"PowerPC Book-E Watchdog Timer Enabled (wdt_period=%d)\n",
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booke_wdt_period);
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}
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spin_unlock(&booke_wdt_lock);
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return nonseekable_open(inode, file);
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}
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static const struct file_operations booke_wdt_fops = {
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.owner = THIS_MODULE,
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.llseek = no_llseek,
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.write = booke_wdt_write,
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.unlocked_ioctl = booke_wdt_ioctl,
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.open = booke_wdt_open,
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};
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static struct miscdevice booke_wdt_miscdev = {
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.minor = WATCHDOG_MINOR,
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.name = "watchdog",
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.fops = &booke_wdt_fops,
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};
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static void __exit booke_wdt_exit(void)
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{
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misc_deregister(&booke_wdt_miscdev);
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}
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static int __init booke_wdt_init(void)
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{
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int ret = 0;
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printk(KERN_INFO "PowerPC Book-E Watchdog Timer Loaded\n");
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ident.firmware_version = cur_cpu_spec->pvr_value;
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ret = misc_register(&booke_wdt_miscdev);
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if (ret) {
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printk(KERN_CRIT "Cannot register miscdev on minor=%d: %d\n",
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WATCHDOG_MINOR, ret);
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return ret;
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}
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spin_lock(&booke_wdt_lock);
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if (booke_wdt_enabled == 1) {
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printk(KERN_INFO
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"PowerPC Book-E Watchdog Timer Enabled (wdt_period=%d)\n",
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booke_wdt_period);
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on_each_cpu(__booke_wdt_enable, NULL, 0);
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}
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spin_unlock(&booke_wdt_lock);
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return ret;
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}
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device_initcall(booke_wdt_init);
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