Ferry Toth 035b73b2b3 dmaengine: hsu: disable spurious interrupt ... On Intel Tangier B0 and Anniedale the interrupt line, disregarding to have different numbers, is shared between HSU DMA and UART IPs. Thus on such SoCs we are expecting that IRQ handler is called in UART driver only. hsu_pci_irq was handling the spurious interrupt from HSU DMA by returning immediately. This wastes CPU time and since HSU DMA and HSU UART interrupt occur simultaneously they race to be handled causing delay to the HSU UART interrupt handling. Fix this by disabling the interrupt entirely. Fixes: 4831e0d905 ("serial: 8250_mid: handle interrupt correctly in DMA case") Signed-off-by: Ferry Toth <ftoth@exalondelft.nl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20210112223749.97036-1-ftoth@exalondelft.nl Signed-off-by: Vinod Koul <vkoul@kernel.org>		2021-01-13 22:01:34 +05:30
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hsu.c	dmaengine updates for v5.3-rc1	2019-07-17 09:55:43 -07:00
hsu.h
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pci.c	dmaengine: hsu: disable spurious interrupt	2021-01-13 22:01:34 +05:30