linux/drivers/gpu/drm/amd/display/amdgpu_dm
Bhawanpreet Lakha d6c6a76f80 drm: Update MST First Link Slot Information Based on Encoding Format
8b/10b encoding format requires to reserve the first slot for
recording metadata. Real data transmission starts from the second slot,
with a total of available 63 slots available.

In 128b/132b encoding format, metadata is transmitted separately
in LLCP packet before MTP. Real data transmission starts from
the first slot, with a total of 64 slots available.

v2:
* Move total/start slots to mst_state, and copy it to mst_mgr in
atomic_check

v3:
* Only keep the slot info on the mst_state
* add a start_slot parameter to the payload function, to facilitate non
  atomic drivers (this is a temporary workaround and should be removed when
  we are moving out the non atomic driver helpers)

v4:
*fixed typo and formatting

v5: (no functional changes)
* Fixed formatting in drm_dp_mst_update_slots()
* Reference mst_state instead of mst_state->mgr for debugging info

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
[v5 nitpicks]
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211025223825.301703-3-lyude@redhat.com
2021-10-25 21:21:07 -04:00
..
amdgpu_dm_color.c drm/amd/display: Verify Gamma & Degamma LUT sizes in amdgpu_dm_atomic_check 2021-06-11 16:16:07 -04:00
amdgpu_dm_crc.c drm/amd/display: Avoid get/put vblank when stream disabled 2021-05-19 22:39:28 -04:00
amdgpu_dm_crc.h drm/amd/display: Refactor suspend/resume of Secure display 2021-05-19 22:39:16 -04:00
amdgpu_dm_debugfs.c drm/amd/display: update cur_lane_setting to an array one for each lane 2021-09-28 09:30:10 -04:00
amdgpu_dm_debugfs.h
amdgpu_dm_hdcp.c drm/amd/display: Fix for null pointer access for ddc pin and aux engine. 2021-09-14 15:57:09 -04:00
amdgpu_dm_hdcp.h
amdgpu_dm_helpers.c drm: Update MST First Link Slot Information Based on Encoding Format 2021-10-25 21:21:07 -04:00
amdgpu_dm_irq_params.h drm/amd/display: Use vblank control events for PSR enable/disable 2021-08-16 15:35:56 -04:00
amdgpu_dm_irq.c drm/amd/display: use GFP_ATOMIC in amdgpu_dm_irq_schedule_work 2021-08-09 15:44:09 -04:00
amdgpu_dm_irq.h drm/amd/display: Support for DMUB AUX 2021-05-10 18:06:44 -04:00
amdgpu_dm_mst_types.c drm/amd/display: dsc mst 2 4K displays go dark with 2 lane HBR3 2021-09-14 15:57:10 -04:00
amdgpu_dm_mst_types.h drm/amd/display: dsc mst 2 4K displays go dark with 2 lane HBR3 2021-09-14 15:57:10 -04:00
amdgpu_dm_pp_smu.c
amdgpu_dm_psr.c drm/amd/display: remove unused variable 'dc' 2021-06-18 17:14:30 -04:00
amdgpu_dm_psr.h drm/amd/display: Delay PSR entry 2021-06-21 17:45:14 -04:00
amdgpu_dm_services.c
amdgpu_dm_trace.h drm/amd/display: Add control mechanism for FPU utilization 2021-08-05 21:17:59 -04:00
amdgpu_dm.c drm/amd/display: Add 120Hz support for freesync video mode 2021-10-06 15:53:43 -04:00
amdgpu_dm.h drm/amd/display: Support for SET_CONFIG processing with DMUB 2021-10-06 15:52:30 -04:00
dc_fpu.c drm/amd/display: Re-arrange FPU code structure for dcn2x 2021-10-06 15:49:24 -04:00
dc_fpu.h drm/amd/display: Add DC_FP helper to check FPU state 2021-08-05 21:17:59 -04:00
Makefile drm/amd/display: Add control mechanism for FPU 2021-08-05 21:17:59 -04:00