forked from Minki/linux
d6a90bb83b
P9 supports PCI tunneled operations (atomics and as_notify). This patch adds support for tunneled operations on powernv, with a new API, to be called by device drivers: pnv_pci_enable_tunnel() Enable tunnel operations, tell driver the 16-bit ASN indication used by kernel. pnv_pci_disable_tunnel() Disable tunnel operations. pnv_pci_set_tunnel_bar() Tell kernel the Tunnel BAR Response address used by driver. This function uses two new OPAL calls, as the PBCQ Tunnel BAR register is configured by skiboot. pnv_pci_get_as_notify_info() Return the ASN info of the thread to be woken up. Signed-off-by: Philippe Bergheaud <felix@linux.vnet.ibm.com> Reviewed-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Reviewed-by: Christophe Lombard <clombard@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
94 lines
3.2 KiB
C
94 lines
3.2 KiB
C
/*
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* Copyright 2014 IBM Corp.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef _ASM_PNV_PCI_H
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#define _ASM_PNV_PCI_H
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#include <linux/pci.h>
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#include <linux/pci_hotplug.h>
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#include <linux/irq.h>
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#include <misc/cxl-base.h>
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#include <asm/opal-api.h>
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#define PCI_SLOT_ID_PREFIX (1UL << 63)
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#define PCI_SLOT_ID(phb_id, bdfn) \
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(PCI_SLOT_ID_PREFIX | ((uint64_t)(bdfn) << 16) | (phb_id))
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extern int pnv_pci_get_slot_id(struct device_node *np, uint64_t *id);
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extern int pnv_pci_get_device_tree(uint32_t phandle, void *buf, uint64_t len);
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extern int pnv_pci_get_presence_state(uint64_t id, uint8_t *state);
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extern int pnv_pci_get_power_state(uint64_t id, uint8_t *state);
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extern int pnv_pci_set_power_state(uint64_t id, uint8_t state,
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struct opal_msg *msg);
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extern int pnv_pci_set_p2p(struct pci_dev *initiator, struct pci_dev *target,
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u64 desc);
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extern int pnv_pci_enable_tunnel(struct pci_dev *dev, uint64_t *asnind);
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extern int pnv_pci_disable_tunnel(struct pci_dev *dev);
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extern int pnv_pci_set_tunnel_bar(struct pci_dev *dev, uint64_t addr,
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int enable);
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extern int pnv_pci_get_as_notify_info(struct task_struct *task, u32 *lpid,
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u32 *pid, u32 *tid);
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int pnv_phb_to_cxl_mode(struct pci_dev *dev, uint64_t mode);
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int pnv_cxl_ioda_msi_setup(struct pci_dev *dev, unsigned int hwirq,
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unsigned int virq);
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int pnv_cxl_alloc_hwirqs(struct pci_dev *dev, int num);
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void pnv_cxl_release_hwirqs(struct pci_dev *dev, int hwirq, int num);
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int pnv_cxl_get_irq_count(struct pci_dev *dev);
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struct device_node *pnv_pci_get_phb_node(struct pci_dev *dev);
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int64_t pnv_opal_pci_msi_eoi(struct irq_chip *chip, unsigned int hw_irq);
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bool is_pnv_opal_msi(struct irq_chip *chip);
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#ifdef CONFIG_CXL_BASE
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int pnv_cxl_alloc_hwirq_ranges(struct cxl_irq_ranges *irqs,
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struct pci_dev *dev, int num);
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void pnv_cxl_release_hwirq_ranges(struct cxl_irq_ranges *irqs,
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struct pci_dev *dev);
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/* Support for the cxl kernel api on the real PHB (instead of vPHB) */
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int pnv_cxl_enable_phb_kernel_api(struct pci_controller *hose, bool enable);
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bool pnv_pci_on_cxl_phb(struct pci_dev *dev);
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struct cxl_afu *pnv_cxl_phb_to_afu(struct pci_controller *hose);
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void pnv_cxl_phb_set_peer_afu(struct pci_dev *dev, struct cxl_afu *afu);
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#endif
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struct pnv_php_slot {
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struct hotplug_slot slot;
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struct hotplug_slot_info slot_info;
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uint64_t id;
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char *name;
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int slot_no;
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unsigned int flags;
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#define PNV_PHP_FLAG_BROKEN_PDC 0x1
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struct kref kref;
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#define PNV_PHP_STATE_INITIALIZED 0
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#define PNV_PHP_STATE_REGISTERED 1
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#define PNV_PHP_STATE_POPULATED 2
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#define PNV_PHP_STATE_OFFLINE 3
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int state;
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int irq;
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struct workqueue_struct *wq;
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struct device_node *dn;
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struct pci_dev *pdev;
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struct pci_bus *bus;
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bool power_state_check;
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void *fdt;
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void *dt;
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struct of_changeset ocs;
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struct pnv_php_slot *parent;
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struct list_head children;
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struct list_head link;
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};
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extern struct pnv_php_slot *pnv_php_find_slot(struct device_node *dn);
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extern int pnv_php_set_slot_power_state(struct hotplug_slot *slot,
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uint8_t state);
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#endif
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