Satheeshakrishna M d683f3bc48 drm/i915/bxt: BXT clock divider calculation ... Calculate and cache clock parameters. Follow bspec algorithm for HDMI. Use precalculated values for DisplayPort linkrates. v2: (imre) - rebase against upstream crtc_state change - use the existing CHV based helper instead of handrolling the same Signed-off-by: Satheeshakrishna M <satheeshakrishna.m@intel.com> (v1) Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>		2015-04-16 11:29:07 +02:00
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drm	drm/i915/bxt: BXT clock divider calculation	2015-04-16 11:29:07 +02:00
host1x	gpu: host1x: Export host1x_syncpt_read()	2015-04-02 18:46:20 +02:00
ipu-v3	gpu: ipu-v3: turns out the IPU can only downsize 4:1	2015-03-31 12:03:55 +02:00
vga
Makefile	gpu: host1x: Provide a proper struct bus_type	2015-01-27 10:09:14 +01:00