Dillon Varone d6170e418d drm/amd/display: Acquire FCLK DPM levels on DCN32 ... [Why & How] Acquire FCLK DPM levels to properly construct DML clock limits. Further add new logic to keep number of indices for each clock in clk_mgr. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Dillon Varone <Dillon.Varone@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2022-10-10 17:32:55 -04:00
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drm	drm/amd/display: Acquire FCLK DPM levels on DCN32	2022-10-10 17:32:55 -04:00
host1x	gpu: host1x: Use the bitmap API to allocate bitmaps	2022-07-08 17:38:34 +02:00
ipu-v3	drm/imx: various cleanups	2022-05-06 15:07:39 +10:00
trace
vga
Makefile	gpu: host1x: Add context bus	2022-06-01 11:50:42 +02:00