forked from Minki/linux
05e152c76a
OMAP5430 is Texas Instrument's SOC based on ARM Cortex-A15 SMP architecture. It's a dual core SOC with GIC used for interrupt handling and with an integrated L2 cache controller. OMAP5432 is another variant of OMAP5430, with a memory controller supporting DDR3 and SATA. Patch includes: - The machine specific headers and sources updates. - Platform header updates. - Minimum initialisation support for serial. - IO table init Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
166 lines
4.9 KiB
ArmAsm
166 lines
4.9 KiB
ArmAsm
/* arch/arm/mach-omap2/include/mach/debug-macro.S
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*
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* Debugging macro include header
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*
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* Copyright (C) 1994-1999 Russell King
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* Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/serial_reg.h>
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#include <plat/serial.h>
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#define UART_OFFSET(addr) ((addr) & 0x00ffffff)
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.pushsection .data
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omap_uart_phys: .word 0
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omap_uart_virt: .word 0
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omap_uart_lsr: .word 0
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.popsection
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/*
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* Note that this code won't work if the bootloader passes
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* a wrong machine ID number in r1. To debug, just hardcode
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* the desired UART phys and virt addresses temporarily into
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* the omap_uart_phys and omap_uart_virt above.
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*/
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.macro addruart, rp, rv, tmp
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/* Use omap_uart_phys/virt if already configured */
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10: adr \rp, 99f @ get effective addr of 99f
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ldr \rv, [\rp] @ get absolute addr of 99f
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sub \rv, \rv, \rp @ offset between the two
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ldr \rp, [\rp, #4] @ abs addr of omap_uart_phys
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sub \tmp, \rp, \rv @ make it effective
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ldr \rp, [\tmp, #0] @ omap_uart_phys
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ldr \rv, [\tmp, #4] @ omap_uart_virt
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cmp \rp, #0 @ is port configured?
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cmpne \rv, #0
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bne 100f @ already configured
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/* Check the debug UART configuration set in uncompress.h */
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mov \rp, pc
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ldr \rv, =OMAP_UART_INFO_OFS
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and \rp, \rp, #0xff000000
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ldr \rp, [\rp, \rv]
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/* Select the UART to use based on the UART1 scratchpad value */
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cmp \rp, #0 @ no port configured?
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beq 21f @ if none, try to use UART1
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cmp \rp, #OMAP2UART1 @ OMAP2/3/4UART1
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beq 21f @ configure OMAP2/3/4UART1
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cmp \rp, #OMAP2UART2 @ OMAP2/3/4UART2
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beq 22f @ configure OMAP2/3/4UART2
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cmp \rp, #OMAP2UART3 @ only on 24xx
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beq 23f @ configure OMAP2UART3
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cmp \rp, #OMAP3UART3 @ only on 34xx
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beq 33f @ configure OMAP3UART3
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cmp \rp, #OMAP4UART3 @ only on 44xx/54xx
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beq 43f @ configure OMAP4/5UART3
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cmp \rp, #OMAP3UART4 @ only on 36xx
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beq 34f @ configure OMAP3UART4
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cmp \rp, #OMAP4UART4 @ only on 44xx/54xx
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beq 44f @ configure OMAP4/5UART4
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cmp \rp, #TI81XXUART1 @ ti81Xx UART offsets different
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beq 81f @ configure UART1
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cmp \rp, #TI81XXUART2 @ ti81Xx UART offsets different
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beq 82f @ configure UART2
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cmp \rp, #TI81XXUART3 @ ti81Xx UART offsets different
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beq 83f @ configure UART3
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cmp \rp, #AM33XXUART1 @ AM33XX UART offsets different
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beq 84f @ configure UART1
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cmp \rp, #ZOOM_UART @ only on zoom2/3
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beq 95f @ configure ZOOM_UART
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/* Configure the UART offset from the phys/virt base */
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21: mov \rp, #UART_OFFSET(OMAP2_UART1_BASE) @ omap2/3/4
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b 98f
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22: mov \rp, #UART_OFFSET(OMAP2_UART2_BASE) @ omap2/3/4
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b 98f
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23: mov \rp, #UART_OFFSET(OMAP2_UART3_BASE)
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b 98f
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33: mov \rp, #UART_OFFSET(OMAP3_UART1_BASE)
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add \rp, \rp, #0x00fb0000
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add \rp, \rp, #0x00006000 @ OMAP3_UART3_BASE
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b 98f
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34: mov \rp, #UART_OFFSET(OMAP3_UART1_BASE)
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add \rp, \rp, #0x00fb0000
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add \rp, \rp, #0x00028000 @ OMAP3_UART4_BASE
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b 98f
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43: mov \rp, #UART_OFFSET(OMAP4_UART3_BASE)
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b 98f
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44: mov \rp, #UART_OFFSET(OMAP4_UART4_BASE)
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b 98f
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81: mov \rp, #UART_OFFSET(TI81XX_UART1_BASE)
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b 98f
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82: mov \rp, #UART_OFFSET(TI81XX_UART2_BASE)
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b 98f
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83: mov \rp, #UART_OFFSET(TI81XX_UART3_BASE)
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b 98f
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84: ldr \rp, =AM33XX_UART1_BASE
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and \rp, \rp, #0x00ffffff
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b 97f
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95: ldr \rp, =ZOOM_UART_BASE
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str \rp, [\tmp, #0] @ omap_uart_phys
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ldr \rp, =ZOOM_UART_VIRT
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str \rp, [\tmp, #4] @ omap_uart_virt
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mov \rp, #(UART_LSR << ZOOM_PORT_SHIFT)
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str \rp, [\tmp, #8] @ omap_uart_lsr
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b 10b
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/* AM33XX: Store both phys and virt address for the uart */
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97: add \rp, \rp, #0x44000000 @ phys base
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str \rp, [\tmp, #0] @ omap_uart_phys
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sub \rp, \rp, #0x44000000 @ phys base
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add \rp, \rp, #0xf9000000 @ virt base
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str \rp, [\tmp, #4] @ omap_uart_virt
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mov \rp, #(UART_LSR << OMAP_PORT_SHIFT)
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str \rp, [\tmp, #8] @ omap_uart_lsr
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b 10b
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/* Store both phys and virt address for the uart */
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98: add \rp, \rp, #0x48000000 @ phys base
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str \rp, [\tmp, #0] @ omap_uart_phys
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sub \rp, \rp, #0x48000000 @ phys base
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add \rp, \rp, #0xfa000000 @ virt base
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str \rp, [\tmp, #4] @ omap_uart_virt
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mov \rp, #(UART_LSR << OMAP_PORT_SHIFT)
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str \rp, [\tmp, #8] @ omap_uart_lsr
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b 10b
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.align
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99: .word .
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.word omap_uart_phys
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.ltorg
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100: /* Pass the UART_LSR reg address */
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ldr \tmp, [\tmp, #8] @ omap_uart_lsr
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add \rp, \rp, \tmp
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add \rv, \rv, \tmp
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.endm
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.macro senduart,rd,rx
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orr \rd, \rd, \rx, lsl #24 @ preserve LSR reg offset
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bic \rx, \rx, #0xff @ get base (THR) reg address
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strb \rd, [\rx] @ send lower byte of rd
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orr \rx, \rx, \rd, lsr #24 @ restore original rx (LSR)
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bic \rd, \rd, #(0xff << 24) @ restore original rd
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.endm
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.macro busyuart,rd,rx
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1001: ldrb \rd, [\rx] @ rx contains UART_LSR address
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and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
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teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
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bne 1001b
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.endm
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.macro waituart,rd,rx
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.endm
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