forked from Minki/linux
d5148ffa60
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
1231 lines
29 KiB
C
1231 lines
29 KiB
C
/*
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* File: drivers/serial/bfin_5xx.c
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* Based on: Based on drivers/serial/sa1100.c
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* Author: Aubrey Li <aubrey.li@analog.com>
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*
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* Created:
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* Description: Driver for blackfin 5xx serial ports
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*
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* Modified:
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* Copyright 2006 Analog Devices Inc.
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*
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see the file COPYING, or write
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* to the Free Software Foundation, Inc.,
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
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#define SUPPORT_SYSRQ
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#endif
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#include <linux/module.h>
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#include <linux/ioport.h>
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#include <linux/init.h>
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#include <linux/console.h>
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#include <linux/sysrq.h>
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#include <linux/platform_device.h>
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#include <linux/serial_core.h>
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#ifdef CONFIG_KGDB_UART
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#include <linux/kgdb.h>
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#include <asm/irq_regs.h>
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#endif
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#include <asm/gpio.h>
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#include <asm/mach/bfin_serial_5xx.h>
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#ifdef CONFIG_SERIAL_BFIN_DMA
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#include <linux/dma-mapping.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/cacheflush.h>
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#endif
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/* UART name and device definitions */
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#define BFIN_SERIAL_NAME "ttyBF"
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#define BFIN_SERIAL_MAJOR 204
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#define BFIN_SERIAL_MINOR 64
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/*
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* Setup for console. Argument comes from the menuconfig
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*/
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#define DMA_RX_XCOUNT 512
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#define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
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#define DMA_RX_FLUSH_JIFFIES 5
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#ifdef CONFIG_SERIAL_BFIN_DMA
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static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
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#else
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static void bfin_serial_do_work(struct work_struct *work);
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static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
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static void local_put_char(struct bfin_serial_port *uart, char ch);
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#endif
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static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
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/*
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* interrupts are disabled on entry
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*/
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static void bfin_serial_stop_tx(struct uart_port *port)
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{
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struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
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#ifdef CONFIG_BF54x
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while (!(UART_GET_LSR(uart) & TEMT))
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continue;
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#endif
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#ifdef CONFIG_SERIAL_BFIN_DMA
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disable_dma(uart->tx_dma_channel);
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#else
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#ifdef CONFIG_BF54x
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/* Waiting for Transmission Finished */
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while (!(UART_GET_LSR(uart) & TFI))
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continue;
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/* Clear TFI bit */
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UART_PUT_LSR(uart, TFI);
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UART_CLEAR_IER(uart, ETBEI);
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#else
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unsigned short ier;
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ier = UART_GET_IER(uart);
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ier &= ~ETBEI;
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UART_PUT_IER(uart, ier);
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#endif
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#endif
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}
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/*
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* port is locked and interrupts are disabled
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*/
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static void bfin_serial_start_tx(struct uart_port *port)
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{
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struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
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#ifdef CONFIG_SERIAL_BFIN_DMA
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bfin_serial_dma_tx_chars(uart);
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#else
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#ifdef CONFIG_BF54x
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UART_SET_IER(uart, ETBEI);
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#else
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unsigned short ier;
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ier = UART_GET_IER(uart);
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ier |= ETBEI;
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UART_PUT_IER(uart, ier);
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bfin_serial_tx_chars(uart);
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#endif
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#endif
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}
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/*
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* Interrupts are enabled
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*/
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static void bfin_serial_stop_rx(struct uart_port *port)
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{
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struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
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#ifdef CONFIG_BF54x
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UART_CLEAR_IER(uart, ERBFI);
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#else
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unsigned short ier;
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ier = UART_GET_IER(uart);
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#ifdef CONFIG_KGDB_UART
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if (uart->port.line != CONFIG_KGDB_UART_PORT)
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#endif
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ier &= ~ERBFI;
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UART_PUT_IER(uart, ier);
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#endif
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}
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/*
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* Set the modem control timer to fire immediately.
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*/
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static void bfin_serial_enable_ms(struct uart_port *port)
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{
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}
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#ifdef CONFIG_KGDB_UART
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static int kgdb_entry_state;
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void kgdb_put_debug_char(int chr)
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{
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struct bfin_serial_port *uart;
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if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
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uart = &bfin_serial_ports[0];
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else
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uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
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while (!(UART_GET_LSR(uart) & THRE)) {
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SSYNC();
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}
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UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
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SSYNC();
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UART_PUT_CHAR(uart, (unsigned char)chr);
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SSYNC();
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}
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int kgdb_get_debug_char(void)
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{
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struct bfin_serial_port *uart;
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unsigned char chr;
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if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
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uart = &bfin_serial_ports[0];
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else
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uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
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while(!(UART_GET_LSR(uart) & DR)) {
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SSYNC();
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}
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UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
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SSYNC();
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chr = UART_GET_CHAR(uart);
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SSYNC();
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return chr;
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}
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#endif
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#ifdef CONFIG_SERIAL_BFIN_PIO
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static void local_put_char(struct bfin_serial_port *uart, char ch)
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{
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unsigned short status;
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int flags = 0;
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spin_lock_irqsave(&uart->port.lock, flags);
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do {
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status = UART_GET_LSR(uart);
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} while (!(status & THRE));
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UART_PUT_CHAR(uart, ch);
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SSYNC();
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spin_unlock_irqrestore(&uart->port.lock, flags);
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}
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static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
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{
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struct tty_struct *tty = uart->port.info->tty;
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unsigned int status, ch, flg;
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#ifdef CONFIG_KGDB_UART
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struct pt_regs *regs = get_irq_regs();
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#endif
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#ifdef BF533_FAMILY
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static int in_break = 0;
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#endif
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status = UART_GET_LSR(uart);
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ch = UART_GET_CHAR(uart);
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uart->port.icount.rx++;
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#ifdef CONFIG_KGDB_UART
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if (uart->port.line == CONFIG_KGDB_UART_PORT) {
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if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
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kgdb_breakkey_pressed(regs);
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return;
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} else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */
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kgdb_entry_state = 1;
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} else if (kgdb_entry_state == 1 && ch == 'q') {
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kgdb_entry_state = 0;
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kgdb_breakkey_pressed(regs);
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return;
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} else if (ch == 0x3) {/* Ctrl + C */
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kgdb_entry_state = 0;
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kgdb_breakkey_pressed(regs);
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return;
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} else {
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kgdb_entry_state = 0;
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}
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}
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#endif
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#ifdef BF533_FAMILY
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/* The BF533 family of processors have a nice misbehavior where
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* they continuously generate characters for a "single" break.
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* We have to basically ignore this flood until the "next" valid
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* character comes across. All other Blackfin families operate
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* properly though.
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*/
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if (in_break) {
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if (ch != 0) {
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in_break = 0;
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ch = UART_GET_CHAR(uart);
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if (bfin_revid() < 5)
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return;
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} else
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return;
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}
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#endif
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if (status & BI) {
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#ifdef BF533_FAMILY
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in_break = 1;
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#endif
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uart->port.icount.brk++;
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if (uart_handle_break(&uart->port))
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goto ignore_char;
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status &= ~(PE | FE);
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}
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if (status & PE)
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uart->port.icount.parity++;
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if (status & OE)
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uart->port.icount.overrun++;
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if (status & FE)
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uart->port.icount.frame++;
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status &= uart->port.read_status_mask;
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if (status & BI)
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flg = TTY_BREAK;
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else if (status & PE)
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flg = TTY_PARITY;
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else if (status & FE)
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flg = TTY_FRAME;
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else
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flg = TTY_NORMAL;
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if (uart_handle_sysrq_char(&uart->port, ch))
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goto ignore_char;
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uart_insert_char(&uart->port, status, OE, ch, flg);
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ignore_char:
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tty_flip_buffer_push(tty);
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}
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static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
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{
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struct circ_buf *xmit = &uart->port.info->xmit;
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if (uart->port.x_char) {
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UART_PUT_CHAR(uart, uart->port.x_char);
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uart->port.icount.tx++;
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uart->port.x_char = 0;
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return;
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}
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/*
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* Check the modem control lines before
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* transmitting anything.
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*/
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bfin_serial_mctrl_check(uart);
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if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
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bfin_serial_stop_tx(&uart->port);
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return;
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}
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local_put_char(uart, xmit->buf[xmit->tail]);
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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uart->port.icount.tx++;
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(&uart->port);
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if (uart_circ_empty(xmit))
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bfin_serial_stop_tx(&uart->port);
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}
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static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
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{
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struct bfin_serial_port *uart = dev_id;
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#ifdef CONFIG_BF54x
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unsigned short status;
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spin_lock(&uart->port.lock);
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status = UART_GET_LSR(uart);
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while ((UART_GET_IER(uart) & ERBFI) && (status & DR)) {
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bfin_serial_rx_chars(uart);
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status = UART_GET_LSR(uart);
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}
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spin_unlock(&uart->port.lock);
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#else
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spin_lock(&uart->port.lock);
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while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_RX_READY)
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bfin_serial_rx_chars(uart);
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spin_unlock(&uart->port.lock);
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#endif
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return IRQ_HANDLED;
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}
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static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
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{
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struct bfin_serial_port *uart = dev_id;
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#ifdef CONFIG_BF54x
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unsigned short status;
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spin_lock(&uart->port.lock);
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status = UART_GET_LSR(uart);
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while ((UART_GET_IER(uart) & ETBEI) && (status & THRE)) {
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bfin_serial_tx_chars(uart);
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status = UART_GET_LSR(uart);
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}
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spin_unlock(&uart->port.lock);
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#else
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spin_lock(&uart->port.lock);
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while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_TX_READY)
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bfin_serial_tx_chars(uart);
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spin_unlock(&uart->port.lock);
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#endif
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return IRQ_HANDLED;
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}
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static void bfin_serial_do_work(struct work_struct *work)
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{
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struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
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bfin_serial_mctrl_check(uart);
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}
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#endif
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#ifdef CONFIG_SERIAL_BFIN_DMA
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static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
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{
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struct circ_buf *xmit = &uart->port.info->xmit;
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unsigned short ier;
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int flags = 0;
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if (!uart->tx_done)
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return;
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uart->tx_done = 0;
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if (uart->port.x_char) {
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UART_PUT_CHAR(uart, uart->port.x_char);
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uart->port.icount.tx++;
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uart->port.x_char = 0;
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uart->tx_done = 1;
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return;
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}
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/*
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* Check the modem control lines before
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* transmitting anything.
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*/
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bfin_serial_mctrl_check(uart);
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if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
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bfin_serial_stop_tx(&uart->port);
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uart->tx_done = 1;
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return;
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}
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spin_lock_irqsave(&uart->port.lock, flags);
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uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
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if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
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uart->tx_count = UART_XMIT_SIZE - xmit->tail;
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blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
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(unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
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set_dma_config(uart->tx_dma_channel,
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set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
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INTR_ON_BUF,
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DIMENSION_LINEAR,
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DATA_SIZE_8));
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set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
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set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
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set_dma_x_modify(uart->tx_dma_channel, 1);
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enable_dma(uart->tx_dma_channel);
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#ifdef CONFIG_BF54x
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UART_SET_IER(uart, ETBEI);
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#else
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ier = UART_GET_IER(uart);
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ier |= ETBEI;
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UART_PUT_IER(uart, ier);
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#endif
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spin_unlock_irqrestore(&uart->port.lock, flags);
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}
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|
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static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
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{
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struct tty_struct *tty = uart->port.info->tty;
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int i, flg, status;
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|
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status = UART_GET_LSR(uart);
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uart->port.icount.rx += CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail, UART_XMIT_SIZE);;
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|
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if (status & BI) {
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uart->port.icount.brk++;
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if (uart_handle_break(&uart->port))
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goto dma_ignore_char;
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status &= ~(PE | FE);
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}
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if (status & PE)
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uart->port.icount.parity++;
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if (status & OE)
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uart->port.icount.overrun++;
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if (status & FE)
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uart->port.icount.frame++;
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|
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status &= uart->port.read_status_mask;
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|
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if (status & BI)
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flg = TTY_BREAK;
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else if (status & PE)
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flg = TTY_PARITY;
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else if (status & FE)
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flg = TTY_FRAME;
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else
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flg = TTY_NORMAL;
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for (i = uart->rx_dma_buf.head; i < uart->rx_dma_buf.tail; i++) {
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if (uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
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goto dma_ignore_char;
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uart_insert_char(&uart->port, status, OE, uart->rx_dma_buf.buf[i], flg);
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}
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dma_ignore_char:
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tty_flip_buffer_push(tty);
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}
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|
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void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
|
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{
|
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int x_pos, pos;
|
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int flags = 0;
|
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|
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bfin_serial_dma_tx_chars(uart);
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|
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spin_lock_irqsave(&uart->port.lock, flags);
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x_pos = DMA_RX_XCOUNT - get_dma_curr_xcount(uart->rx_dma_channel);
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if (x_pos == DMA_RX_XCOUNT)
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x_pos = 0;
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|
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pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
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|
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if (pos>uart->rx_dma_buf.tail) {
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uart->rx_dma_buf.tail = pos;
|
|
bfin_serial_dma_rx_chars(uart);
|
|
uart->rx_dma_buf.head = uart->rx_dma_buf.tail;
|
|
}
|
|
spin_unlock_irqrestore(&uart->port.lock, flags);
|
|
uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
|
|
add_timer(&(uart->rx_dma_timer));
|
|
}
|
|
|
|
static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
|
|
{
|
|
struct bfin_serial_port *uart = dev_id;
|
|
struct circ_buf *xmit = &uart->port.info->xmit;
|
|
unsigned short ier;
|
|
|
|
spin_lock(&uart->port.lock);
|
|
if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
|
|
clear_dma_irqstat(uart->tx_dma_channel);
|
|
disable_dma(uart->tx_dma_channel);
|
|
#ifdef CONFIG_BF54x
|
|
UART_CLEAR_IER(uart, ETBEI);
|
|
#else
|
|
ier = UART_GET_IER(uart);
|
|
ier &= ~ETBEI;
|
|
UART_PUT_IER(uart, ier);
|
|
#endif
|
|
xmit->tail = (xmit->tail+uart->tx_count) &(UART_XMIT_SIZE -1);
|
|
uart->port.icount.tx+=uart->tx_count;
|
|
|
|
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
|
|
uart_write_wakeup(&uart->port);
|
|
|
|
if (uart_circ_empty(xmit))
|
|
bfin_serial_stop_tx(&uart->port);
|
|
uart->tx_done = 1;
|
|
}
|
|
|
|
spin_unlock(&uart->port.lock);
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
|
|
{
|
|
struct bfin_serial_port *uart = dev_id;
|
|
unsigned short irqstat;
|
|
|
|
uart->rx_dma_nrows++;
|
|
if (uart->rx_dma_nrows == DMA_RX_YCOUNT) {
|
|
uart->rx_dma_nrows = 0;
|
|
uart->rx_dma_buf.tail = DMA_RX_XCOUNT*DMA_RX_YCOUNT;
|
|
bfin_serial_dma_rx_chars(uart);
|
|
uart->rx_dma_buf.head = uart->rx_dma_buf.tail = 0;
|
|
}
|
|
spin_lock(&uart->port.lock);
|
|
irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
|
|
clear_dma_irqstat(uart->rx_dma_channel);
|
|
|
|
spin_unlock(&uart->port.lock);
|
|
return IRQ_HANDLED;
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* Return TIOCSER_TEMT when transmitter is not busy.
|
|
*/
|
|
static unsigned int bfin_serial_tx_empty(struct uart_port *port)
|
|
{
|
|
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
|
|
unsigned short lsr;
|
|
|
|
lsr = UART_GET_LSR(uart);
|
|
if (lsr & TEMT)
|
|
return TIOCSER_TEMT;
|
|
else
|
|
return 0;
|
|
}
|
|
|
|
static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
|
|
{
|
|
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
|
|
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
|
|
if (uart->cts_pin < 0)
|
|
return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
|
|
|
|
if (gpio_get_value(uart->cts_pin))
|
|
return TIOCM_DSR | TIOCM_CAR;
|
|
else
|
|
#endif
|
|
return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
|
|
}
|
|
|
|
static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
|
|
{
|
|
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
|
|
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
|
|
if (uart->rts_pin < 0)
|
|
return;
|
|
|
|
if (mctrl & TIOCM_RTS)
|
|
gpio_set_value(uart->rts_pin, 0);
|
|
else
|
|
gpio_set_value(uart->rts_pin, 1);
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* Handle any change of modem status signal since we were last called.
|
|
*/
|
|
static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
|
|
{
|
|
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
|
|
unsigned int status;
|
|
# ifdef CONFIG_SERIAL_BFIN_DMA
|
|
struct uart_info *info = uart->port.info;
|
|
struct tty_struct *tty = info->tty;
|
|
|
|
status = bfin_serial_get_mctrl(&uart->port);
|
|
if (!(status & TIOCM_CTS)) {
|
|
tty->hw_stopped = 1;
|
|
} else {
|
|
tty->hw_stopped = 0;
|
|
}
|
|
# else
|
|
status = bfin_serial_get_mctrl(&uart->port);
|
|
uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
|
|
if (!(status & TIOCM_CTS))
|
|
schedule_work(&uart->cts_workqueue);
|
|
# endif
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* Interrupts are always disabled.
|
|
*/
|
|
static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
|
|
{
|
|
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
|
|
u16 lcr = UART_GET_LCR(uart);
|
|
if (break_state)
|
|
lcr |= SB;
|
|
else
|
|
lcr &= ~SB;
|
|
UART_PUT_LCR(uart, lcr);
|
|
SSYNC();
|
|
}
|
|
|
|
static int bfin_serial_startup(struct uart_port *port)
|
|
{
|
|
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
|
|
|
|
#ifdef CONFIG_SERIAL_BFIN_DMA
|
|
dma_addr_t dma_handle;
|
|
|
|
if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
|
|
printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
|
|
return -EBUSY;
|
|
}
|
|
|
|
if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
|
|
printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
|
|
free_dma(uart->rx_dma_channel);
|
|
return -EBUSY;
|
|
}
|
|
|
|
set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
|
|
set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
|
|
|
|
uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
|
|
uart->rx_dma_buf.head = 0;
|
|
uart->rx_dma_buf.tail = 0;
|
|
uart->rx_dma_nrows = 0;
|
|
|
|
set_dma_config(uart->rx_dma_channel,
|
|
set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
|
|
INTR_ON_ROW, DIMENSION_2D,
|
|
DATA_SIZE_8));
|
|
set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
|
|
set_dma_x_modify(uart->rx_dma_channel, 1);
|
|
set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
|
|
set_dma_y_modify(uart->rx_dma_channel, 1);
|
|
set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
|
|
enable_dma(uart->rx_dma_channel);
|
|
|
|
uart->rx_dma_timer.data = (unsigned long)(uart);
|
|
uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
|
|
uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
|
|
add_timer(&(uart->rx_dma_timer));
|
|
#else
|
|
# ifdef CONFIG_KGDB_UART
|
|
if (uart->port.line != CONFIG_KGDB_UART_PORT && request_irq
|
|
# else
|
|
if (request_irq
|
|
# endif
|
|
(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
|
|
"BFIN_UART_RX", uart)) {
|
|
printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
|
|
return -EBUSY;
|
|
}
|
|
|
|
if (request_irq
|
|
(uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
|
|
"BFIN_UART_TX", uart)) {
|
|
printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
|
|
free_irq(uart->port.irq, uart);
|
|
return -EBUSY;
|
|
}
|
|
#endif
|
|
#ifdef CONFIG_BF54x
|
|
UART_SET_IER(uart, ERBFI);
|
|
#else
|
|
UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
static void bfin_serial_shutdown(struct uart_port *port)
|
|
{
|
|
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
|
|
|
|
#ifdef CONFIG_SERIAL_BFIN_DMA
|
|
disable_dma(uart->tx_dma_channel);
|
|
free_dma(uart->tx_dma_channel);
|
|
disable_dma(uart->rx_dma_channel);
|
|
free_dma(uart->rx_dma_channel);
|
|
del_timer(&(uart->rx_dma_timer));
|
|
#else
|
|
#ifdef CONFIG_KGDB_UART
|
|
if (uart->port.line != CONFIG_KGDB_UART_PORT)
|
|
#endif
|
|
free_irq(uart->port.irq, uart);
|
|
free_irq(uart->port.irq+1, uart);
|
|
#endif
|
|
}
|
|
|
|
static void
|
|
bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
|
|
struct ktermios *old)
|
|
{
|
|
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
|
|
unsigned long flags;
|
|
unsigned int baud, quot;
|
|
unsigned short val, ier, lsr, lcr = 0;
|
|
|
|
switch (termios->c_cflag & CSIZE) {
|
|
case CS8:
|
|
lcr = WLS(8);
|
|
break;
|
|
case CS7:
|
|
lcr = WLS(7);
|
|
break;
|
|
case CS6:
|
|
lcr = WLS(6);
|
|
break;
|
|
case CS5:
|
|
lcr = WLS(5);
|
|
break;
|
|
default:
|
|
printk(KERN_ERR "%s: word lengh not supported\n",
|
|
__FUNCTION__);
|
|
}
|
|
|
|
if (termios->c_cflag & CSTOPB)
|
|
lcr |= STB;
|
|
if (termios->c_cflag & PARENB)
|
|
lcr |= PEN;
|
|
if (!(termios->c_cflag & PARODD))
|
|
lcr |= EPS;
|
|
if (termios->c_cflag & CMSPAR)
|
|
lcr |= STP;
|
|
|
|
port->read_status_mask = OE;
|
|
if (termios->c_iflag & INPCK)
|
|
port->read_status_mask |= (FE | PE);
|
|
if (termios->c_iflag & (BRKINT | PARMRK))
|
|
port->read_status_mask |= BI;
|
|
|
|
/*
|
|
* Characters to ignore
|
|
*/
|
|
port->ignore_status_mask = 0;
|
|
if (termios->c_iflag & IGNPAR)
|
|
port->ignore_status_mask |= FE | PE;
|
|
if (termios->c_iflag & IGNBRK) {
|
|
port->ignore_status_mask |= BI;
|
|
/*
|
|
* If we're ignoring parity and break indicators,
|
|
* ignore overruns too (for real raw support).
|
|
*/
|
|
if (termios->c_iflag & IGNPAR)
|
|
port->ignore_status_mask |= OE;
|
|
}
|
|
|
|
baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
|
|
quot = uart_get_divisor(port, baud);
|
|
spin_lock_irqsave(&uart->port.lock, flags);
|
|
|
|
do {
|
|
lsr = UART_GET_LSR(uart);
|
|
} while (!(lsr & TEMT));
|
|
|
|
/* Disable UART */
|
|
ier = UART_GET_IER(uart);
|
|
#ifdef CONFIG_BF54x
|
|
UART_CLEAR_IER(uart, 0xF);
|
|
#else
|
|
UART_PUT_IER(uart, 0);
|
|
#endif
|
|
|
|
#ifndef CONFIG_BF54x
|
|
/* Set DLAB in LCR to Access DLL and DLH */
|
|
val = UART_GET_LCR(uart);
|
|
val |= DLAB;
|
|
UART_PUT_LCR(uart, val);
|
|
SSYNC();
|
|
#endif
|
|
|
|
UART_PUT_DLL(uart, quot & 0xFF);
|
|
SSYNC();
|
|
UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
|
|
SSYNC();
|
|
|
|
#ifndef CONFIG_BF54x
|
|
/* Clear DLAB in LCR to Access THR RBR IER */
|
|
val = UART_GET_LCR(uart);
|
|
val &= ~DLAB;
|
|
UART_PUT_LCR(uart, val);
|
|
SSYNC();
|
|
#endif
|
|
|
|
UART_PUT_LCR(uart, lcr);
|
|
|
|
/* Enable UART */
|
|
#ifdef CONFIG_BF54x
|
|
UART_SET_IER(uart, ier);
|
|
#else
|
|
UART_PUT_IER(uart, ier);
|
|
#endif
|
|
|
|
val = UART_GET_GCTL(uart);
|
|
val |= UCEN;
|
|
UART_PUT_GCTL(uart, val);
|
|
|
|
spin_unlock_irqrestore(&uart->port.lock, flags);
|
|
}
|
|
|
|
static const char *bfin_serial_type(struct uart_port *port)
|
|
{
|
|
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
|
|
|
|
return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
|
|
}
|
|
|
|
/*
|
|
* Release the memory region(s) being used by 'port'.
|
|
*/
|
|
static void bfin_serial_release_port(struct uart_port *port)
|
|
{
|
|
}
|
|
|
|
/*
|
|
* Request the memory region(s) being used by 'port'.
|
|
*/
|
|
static int bfin_serial_request_port(struct uart_port *port)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Configure/autoconfigure the port.
|
|
*/
|
|
static void bfin_serial_config_port(struct uart_port *port, int flags)
|
|
{
|
|
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
|
|
|
|
if (flags & UART_CONFIG_TYPE &&
|
|
bfin_serial_request_port(&uart->port) == 0)
|
|
uart->port.type = PORT_BFIN;
|
|
}
|
|
|
|
/*
|
|
* Verify the new serial_struct (for TIOCSSERIAL).
|
|
* The only change we allow are to the flags and type, and
|
|
* even then only between PORT_BFIN and PORT_UNKNOWN
|
|
*/
|
|
static int
|
|
bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static struct uart_ops bfin_serial_pops = {
|
|
.tx_empty = bfin_serial_tx_empty,
|
|
.set_mctrl = bfin_serial_set_mctrl,
|
|
.get_mctrl = bfin_serial_get_mctrl,
|
|
.stop_tx = bfin_serial_stop_tx,
|
|
.start_tx = bfin_serial_start_tx,
|
|
.stop_rx = bfin_serial_stop_rx,
|
|
.enable_ms = bfin_serial_enable_ms,
|
|
.break_ctl = bfin_serial_break_ctl,
|
|
.startup = bfin_serial_startup,
|
|
.shutdown = bfin_serial_shutdown,
|
|
.set_termios = bfin_serial_set_termios,
|
|
.type = bfin_serial_type,
|
|
.release_port = bfin_serial_release_port,
|
|
.request_port = bfin_serial_request_port,
|
|
.config_port = bfin_serial_config_port,
|
|
.verify_port = bfin_serial_verify_port,
|
|
};
|
|
|
|
static void __init bfin_serial_init_ports(void)
|
|
{
|
|
static int first = 1;
|
|
int i;
|
|
|
|
if (!first)
|
|
return;
|
|
first = 0;
|
|
|
|
for (i = 0; i < nr_ports; i++) {
|
|
bfin_serial_ports[i].port.uartclk = get_sclk();
|
|
bfin_serial_ports[i].port.ops = &bfin_serial_pops;
|
|
bfin_serial_ports[i].port.line = i;
|
|
bfin_serial_ports[i].port.iotype = UPIO_MEM;
|
|
bfin_serial_ports[i].port.membase =
|
|
(void __iomem *)bfin_serial_resource[i].uart_base_addr;
|
|
bfin_serial_ports[i].port.mapbase =
|
|
bfin_serial_resource[i].uart_base_addr;
|
|
bfin_serial_ports[i].port.irq =
|
|
bfin_serial_resource[i].uart_irq;
|
|
bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
|
|
#ifdef CONFIG_SERIAL_BFIN_DMA
|
|
bfin_serial_ports[i].tx_done = 1;
|
|
bfin_serial_ports[i].tx_count = 0;
|
|
bfin_serial_ports[i].tx_dma_channel =
|
|
bfin_serial_resource[i].uart_tx_dma_channel;
|
|
bfin_serial_ports[i].rx_dma_channel =
|
|
bfin_serial_resource[i].uart_rx_dma_channel;
|
|
init_timer(&(bfin_serial_ports[i].rx_dma_timer));
|
|
#else
|
|
INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
|
|
bfin_serial_ports[i].cts_pin =
|
|
bfin_serial_resource[i].uart_cts_pin;
|
|
bfin_serial_ports[i].rts_pin =
|
|
bfin_serial_resource[i].uart_rts_pin;
|
|
#endif
|
|
bfin_serial_hw_init(&bfin_serial_ports[i]);
|
|
}
|
|
|
|
}
|
|
|
|
#ifdef CONFIG_SERIAL_BFIN_CONSOLE
|
|
static void bfin_serial_console_putchar(struct uart_port *port, int ch)
|
|
{
|
|
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
|
|
while (!(UART_GET_LSR(uart) & THRE))
|
|
barrier();
|
|
UART_PUT_CHAR(uart, ch);
|
|
SSYNC();
|
|
}
|
|
|
|
/*
|
|
* Interrupts are disabled on entering
|
|
*/
|
|
static void
|
|
bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
|
|
{
|
|
struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
|
|
int flags = 0;
|
|
|
|
spin_lock_irqsave(&uart->port.lock, flags);
|
|
uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
|
|
spin_unlock_irqrestore(&uart->port.lock, flags);
|
|
|
|
}
|
|
|
|
/*
|
|
* If the port was already initialised (eg, by a boot loader),
|
|
* try to determine the current setup.
|
|
*/
|
|
static void __init
|
|
bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
|
|
int *parity, int *bits)
|
|
{
|
|
unsigned short status;
|
|
|
|
status = UART_GET_IER(uart) & (ERBFI | ETBEI);
|
|
if (status == (ERBFI | ETBEI)) {
|
|
/* ok, the port was enabled */
|
|
unsigned short lcr, val;
|
|
unsigned short dlh, dll;
|
|
|
|
lcr = UART_GET_LCR(uart);
|
|
|
|
*parity = 'n';
|
|
if (lcr & PEN) {
|
|
if (lcr & EPS)
|
|
*parity = 'e';
|
|
else
|
|
*parity = 'o';
|
|
}
|
|
switch (lcr & 0x03) {
|
|
case 0: *bits = 5; break;
|
|
case 1: *bits = 6; break;
|
|
case 2: *bits = 7; break;
|
|
case 3: *bits = 8; break;
|
|
}
|
|
#ifndef CONFIG_BF54x
|
|
/* Set DLAB in LCR to Access DLL and DLH */
|
|
val = UART_GET_LCR(uart);
|
|
val |= DLAB;
|
|
UART_PUT_LCR(uart, val);
|
|
#endif
|
|
|
|
dll = UART_GET_DLL(uart);
|
|
dlh = UART_GET_DLH(uart);
|
|
|
|
#ifndef CONFIG_BF54x
|
|
/* Clear DLAB in LCR to Access THR RBR IER */
|
|
val = UART_GET_LCR(uart);
|
|
val &= ~DLAB;
|
|
UART_PUT_LCR(uart, val);
|
|
#endif
|
|
|
|
*baud = get_sclk() / (16*(dll | dlh << 8));
|
|
}
|
|
pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
|
|
}
|
|
|
|
static int __init
|
|
bfin_serial_console_setup(struct console *co, char *options)
|
|
{
|
|
struct bfin_serial_port *uart;
|
|
int baud = 57600;
|
|
int bits = 8;
|
|
int parity = 'n';
|
|
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
|
|
int flow = 'r';
|
|
#else
|
|
int flow = 'n';
|
|
#endif
|
|
|
|
/*
|
|
* Check whether an invalid uart number has been specified, and
|
|
* if so, search for the first available port that does have
|
|
* console support.
|
|
*/
|
|
if (co->index == -1 || co->index >= nr_ports)
|
|
co->index = 0;
|
|
uart = &bfin_serial_ports[co->index];
|
|
|
|
if (options)
|
|
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
|
else
|
|
bfin_serial_console_get_options(uart, &baud, &parity, &bits);
|
|
|
|
return uart_set_options(&uart->port, co, baud, parity, bits, flow);
|
|
}
|
|
|
|
static struct uart_driver bfin_serial_reg;
|
|
static struct console bfin_serial_console = {
|
|
.name = BFIN_SERIAL_NAME,
|
|
.write = bfin_serial_console_write,
|
|
.device = uart_console_device,
|
|
.setup = bfin_serial_console_setup,
|
|
.flags = CON_PRINTBUFFER,
|
|
.index = -1,
|
|
.data = &bfin_serial_reg,
|
|
};
|
|
|
|
static int __init bfin_serial_rs_console_init(void)
|
|
{
|
|
bfin_serial_init_ports();
|
|
register_console(&bfin_serial_console);
|
|
#ifdef CONFIG_KGDB_UART
|
|
kgdb_entry_state = 0;
|
|
init_kgdb_uart();
|
|
#endif
|
|
return 0;
|
|
}
|
|
console_initcall(bfin_serial_rs_console_init);
|
|
|
|
#define BFIN_SERIAL_CONSOLE &bfin_serial_console
|
|
#else
|
|
#define BFIN_SERIAL_CONSOLE NULL
|
|
#endif
|
|
|
|
static struct uart_driver bfin_serial_reg = {
|
|
.owner = THIS_MODULE,
|
|
.driver_name = "bfin-uart",
|
|
.dev_name = BFIN_SERIAL_NAME,
|
|
.major = BFIN_SERIAL_MAJOR,
|
|
.minor = BFIN_SERIAL_MINOR,
|
|
.nr = NR_PORTS,
|
|
.cons = BFIN_SERIAL_CONSOLE,
|
|
};
|
|
|
|
static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
|
|
{
|
|
struct bfin_serial_port *uart = platform_get_drvdata(dev);
|
|
|
|
if (uart)
|
|
uart_suspend_port(&bfin_serial_reg, &uart->port);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int bfin_serial_resume(struct platform_device *dev)
|
|
{
|
|
struct bfin_serial_port *uart = platform_get_drvdata(dev);
|
|
|
|
if (uart)
|
|
uart_resume_port(&bfin_serial_reg, &uart->port);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int bfin_serial_probe(struct platform_device *dev)
|
|
{
|
|
struct resource *res = dev->resource;
|
|
int i;
|
|
|
|
for (i = 0; i < dev->num_resources; i++, res++)
|
|
if (res->flags & IORESOURCE_MEM)
|
|
break;
|
|
|
|
if (i < dev->num_resources) {
|
|
for (i = 0; i < nr_ports; i++, res++) {
|
|
if (bfin_serial_ports[i].port.mapbase != res->start)
|
|
continue;
|
|
bfin_serial_ports[i].port.dev = &dev->dev;
|
|
uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
|
|
platform_set_drvdata(dev, &bfin_serial_ports[i]);
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int bfin_serial_remove(struct platform_device *pdev)
|
|
{
|
|
struct bfin_serial_port *uart = platform_get_drvdata(pdev);
|
|
|
|
|
|
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
|
|
gpio_free(uart->cts_pin);
|
|
gpio_free(uart->rts_pin);
|
|
#endif
|
|
|
|
platform_set_drvdata(pdev, NULL);
|
|
|
|
if (uart)
|
|
uart_remove_one_port(&bfin_serial_reg, &uart->port);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver bfin_serial_driver = {
|
|
.probe = bfin_serial_probe,
|
|
.remove = bfin_serial_remove,
|
|
.suspend = bfin_serial_suspend,
|
|
.resume = bfin_serial_resume,
|
|
.driver = {
|
|
.name = "bfin-uart",
|
|
},
|
|
};
|
|
|
|
static int __init bfin_serial_init(void)
|
|
{
|
|
int ret;
|
|
#ifdef CONFIG_KGDB_UART
|
|
struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
|
|
struct termios t;
|
|
#endif
|
|
|
|
pr_info("Serial: Blackfin serial driver\n");
|
|
|
|
bfin_serial_init_ports();
|
|
|
|
ret = uart_register_driver(&bfin_serial_reg);
|
|
if (ret == 0) {
|
|
ret = platform_driver_register(&bfin_serial_driver);
|
|
if (ret) {
|
|
pr_debug("uart register failed\n");
|
|
uart_unregister_driver(&bfin_serial_reg);
|
|
}
|
|
}
|
|
#ifdef CONFIG_KGDB_UART
|
|
if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
|
|
request_irq(uart->port.irq, bfin_serial_int,
|
|
IRQF_DISABLED, "BFIN_UART_RX", uart);
|
|
pr_info("Request irq for kgdb uart port\n");
|
|
UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
|
|
SSYNC();
|
|
t.c_cflag = CS8|B57600;
|
|
t.c_iflag = 0;
|
|
t.c_oflag = 0;
|
|
t.c_lflag = ICANON;
|
|
t.c_line = CONFIG_KGDB_UART_PORT;
|
|
bfin_serial_set_termios(&uart->port, &t, &t);
|
|
}
|
|
#endif
|
|
return ret;
|
|
}
|
|
|
|
static void __exit bfin_serial_exit(void)
|
|
{
|
|
platform_driver_unregister(&bfin_serial_driver);
|
|
uart_unregister_driver(&bfin_serial_reg);
|
|
}
|
|
|
|
module_init(bfin_serial_init);
|
|
module_exit(bfin_serial_exit);
|
|
|
|
MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
|
|
MODULE_DESCRIPTION("Blackfin generic serial port driver");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
|