forked from Minki/linux
c82baa2818
This implements DPM for tonga. DPM handles dynamic clock and voltage scaling. v2: merge all the patches related with tonga dpm v3: merge dpm force level fix, cgs display fix, spelling fix Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: yanyang1 <young.yang@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
407 lines
17 KiB
C
407 lines
17 KiB
C
/*
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* Copyright 2015 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef TONGA_PPTABLE_H
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#define TONGA_PPTABLE_H
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/** \file
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* This is a PowerPlay table header file
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*/
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#pragma pack(push, 1)
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#include "hwmgr.h"
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#define ATOM_TONGA_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK 0x0f
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#define ATOM_TONGA_PP_FANPARAMETERS_NOFAN 0x80 /* No fan is connected to this controller. */
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#define ATOM_TONGA_PP_THERMALCONTROLLER_NONE 0
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#define ATOM_TONGA_PP_THERMALCONTROLLER_LM96163 17
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#define ATOM_TONGA_PP_THERMALCONTROLLER_TONGA 21
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#define ATOM_TONGA_PP_THERMALCONTROLLER_FIJI 22
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/*
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* Thermal controller 'combo type' to use an external controller for Fan control and an internal controller for thermal.
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* We probably should reserve the bit 0x80 for this use.
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* To keep the number of these types low we should also use the same code for all ASICs (i.e. do not distinguish RV6xx and RV7xx Internal here).
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* The driver can pick the correct internal controller based on the ASIC.
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*/
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#define ATOM_TONGA_PP_THERMALCONTROLLER_ADT7473_WITH_INTERNAL 0x89 /* ADT7473 Fan Control + Internal Thermal Controller */
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#define ATOM_TONGA_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL 0x8D /* EMC2103 Fan Control + Internal Thermal Controller */
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/*/* ATOM_TONGA_POWERPLAYTABLE::ulPlatformCaps */
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#define ATOM_TONGA_PP_PLATFORM_CAP_VDDGFX_CONTROL 0x1 /* This cap indicates whether vddgfx will be a separated power rail. */
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#define ATOM_TONGA_PP_PLATFORM_CAP_POWERPLAY 0x2 /* This cap indicates whether this is a mobile part and CCC need to show Powerplay page. */
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#define ATOM_TONGA_PP_PLATFORM_CAP_SBIOSPOWERSOURCE 0x4 /* This cap indicates whether power source notificaiton is done by SBIOS directly. */
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#define ATOM_TONGA_PP_PLATFORM_CAP_DISABLE_VOLTAGE_ISLAND 0x8 /* Enable the option to overwrite voltage island feature to be disabled, regardless of VddGfx power rail support. */
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#define ____RETIRE16____ 0x10
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#define ATOM_TONGA_PP_PLATFORM_CAP_HARDWAREDC 0x20 /* This cap indicates whether power source notificaiton is done by GPIO directly. */
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#define ____RETIRE64____ 0x40
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#define ____RETIRE128____ 0x80
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#define ____RETIRE256____ 0x100
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#define ____RETIRE512____ 0x200
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#define ____RETIRE1024____ 0x400
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#define ____RETIRE2048____ 0x800
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#define ATOM_TONGA_PP_PLATFORM_CAP_MVDD_CONTROL 0x1000 /* This cap indicates dynamic MVDD is required. Uncheck to disable it. */
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#define ____RETIRE2000____ 0x2000
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#define ____RETIRE4000____ 0x4000
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#define ATOM_TONGA_PP_PLATFORM_CAP_VDDCI_CONTROL 0x8000 /* This cap indicates dynamic VDDCI is required. Uncheck to disable it. */
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#define ____RETIRE10000____ 0x10000
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#define ATOM_TONGA_PP_PLATFORM_CAP_BACO 0x20000 /* Enable to indicate the driver supports BACO state. */
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#define ATOM_TONGA_PP_PLATFORM_CAP_OUTPUT_THERMAL2GPIO17 0x100000 /* Enable to indicate the driver supports thermal2GPIO17. */
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#define ATOM_TONGA_PP_PLATFORM_COMBINE_PCC_WITH_THERMAL_SIGNAL 0x1000000 /* Enable to indicate if thermal and PCC are sharing the same GPIO */
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#define ATOM_TONGA_PLATFORM_LOAD_POST_PRODUCTION_FIRMWARE 0x2000000
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/* ATOM_PPLIB_NONCLOCK_INFO::usClassification */
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#define ATOM_PPLIB_CLASSIFICATION_UI_MASK 0x0007
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#define ATOM_PPLIB_CLASSIFICATION_UI_SHIFT 0
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#define ATOM_PPLIB_CLASSIFICATION_UI_NONE 0
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#define ATOM_PPLIB_CLASSIFICATION_UI_BATTERY 1
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#define ATOM_PPLIB_CLASSIFICATION_UI_BALANCED 3
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#define ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE 5
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/* 2, 4, 6, 7 are reserved */
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#define ATOM_PPLIB_CLASSIFICATION_BOOT 0x0008
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#define ATOM_PPLIB_CLASSIFICATION_THERMAL 0x0010
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#define ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE 0x0020
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#define ATOM_PPLIB_CLASSIFICATION_REST 0x0040
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#define ATOM_PPLIB_CLASSIFICATION_FORCED 0x0080
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#define ATOM_PPLIB_CLASSIFICATION_ACPI 0x1000
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/* ATOM_PPLIB_NONCLOCK_INFO::usClassification2 */
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#define ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2 0x0001
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#define ATOM_Tonga_DISALLOW_ON_DC 0x00004000
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#define ATOM_Tonga_ENABLE_VARIBRIGHT 0x00008000
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#define ATOM_Tonga_TABLE_REVISION_TONGA 7
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typedef struct _ATOM_Tonga_POWERPLAYTABLE {
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ATOM_COMMON_TABLE_HEADER sHeader;
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UCHAR ucTableRevision;
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USHORT usTableSize; /*the size of header structure */
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ULONG ulGoldenPPID;
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ULONG ulGoldenRevision;
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USHORT usFormatID;
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USHORT usVoltageTime; /*in microseconds */
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ULONG ulPlatformCaps; /*See ATOM_Tonga_CAPS_* */
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ULONG ulMaxODEngineClock; /*For Overdrive. */
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ULONG ulMaxODMemoryClock; /*For Overdrive. */
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USHORT usPowerControlLimit;
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USHORT usUlvVoltageOffset; /*in mv units */
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USHORT usStateArrayOffset; /*points to ATOM_Tonga_State_Array */
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USHORT usFanTableOffset; /*points to ATOM_Tonga_Fan_Table */
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USHORT usThermalControllerOffset; /*points to ATOM_Tonga_Thermal_Controller */
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USHORT usReserv; /*CustomThermalPolicy removed for Tonga. Keep this filed as reserved. */
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USHORT usMclkDependencyTableOffset; /*points to ATOM_Tonga_MCLK_Dependency_Table */
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USHORT usSclkDependencyTableOffset; /*points to ATOM_Tonga_SCLK_Dependency_Table */
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USHORT usVddcLookupTableOffset; /*points to ATOM_Tonga_Voltage_Lookup_Table */
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USHORT usVddgfxLookupTableOffset; /*points to ATOM_Tonga_Voltage_Lookup_Table */
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USHORT usMMDependencyTableOffset; /*points to ATOM_Tonga_MM_Dependency_Table */
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USHORT usVCEStateTableOffset; /*points to ATOM_Tonga_VCE_State_Table; */
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USHORT usPPMTableOffset; /*points to ATOM_Tonga_PPM_Table */
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USHORT usPowerTuneTableOffset; /*points to ATOM_PowerTune_Table */
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USHORT usHardLimitTableOffset; /*points to ATOM_Tonga_Hard_Limit_Table */
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USHORT usPCIETableOffset; /*points to ATOM_Tonga_PCIE_Table */
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USHORT usGPIOTableOffset; /*points to ATOM_Tonga_GPIO_Table */
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USHORT usReserved[6]; /*TODO: modify reserved size to fit structure aligning */
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} ATOM_Tonga_POWERPLAYTABLE;
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typedef struct _ATOM_Tonga_State {
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UCHAR ucEngineClockIndexHigh;
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UCHAR ucEngineClockIndexLow;
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UCHAR ucMemoryClockIndexHigh;
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UCHAR ucMemoryClockIndexLow;
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UCHAR ucPCIEGenLow;
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UCHAR ucPCIEGenHigh;
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UCHAR ucPCIELaneLow;
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UCHAR ucPCIELaneHigh;
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USHORT usClassification;
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ULONG ulCapsAndSettings;
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USHORT usClassification2;
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UCHAR ucUnused[4];
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} ATOM_Tonga_State;
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typedef struct _ATOM_Tonga_State_Array {
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UCHAR ucRevId;
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UCHAR ucNumEntries; /* Number of entries. */
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ATOM_Tonga_State states[1]; /* Dynamically allocate entries. */
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} ATOM_Tonga_State_Array;
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typedef struct _ATOM_Tonga_MCLK_Dependency_Record {
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UCHAR ucVddcInd; /* Vddc voltage */
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USHORT usVddci;
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USHORT usVddgfxOffset; /* Offset relative to Vddc voltage */
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USHORT usMvdd;
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ULONG ulMclk;
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USHORT usReserved;
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} ATOM_Tonga_MCLK_Dependency_Record;
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typedef struct _ATOM_Tonga_MCLK_Dependency_Table {
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UCHAR ucRevId;
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UCHAR ucNumEntries; /* Number of entries. */
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ATOM_Tonga_MCLK_Dependency_Record entries[1]; /* Dynamically allocate entries. */
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} ATOM_Tonga_MCLK_Dependency_Table;
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typedef struct _ATOM_Tonga_SCLK_Dependency_Record {
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UCHAR ucVddInd; /* Base voltage */
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USHORT usVddcOffset; /* Offset relative to base voltage */
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ULONG ulSclk;
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USHORT usEdcCurrent;
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UCHAR ucReliabilityTemperature;
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UCHAR ucCKSVOffsetandDisable; /* Bits 0~6: Voltage offset for CKS, Bit 7: Disable/enable for the SCLK level. */
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} ATOM_Tonga_SCLK_Dependency_Record;
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typedef struct _ATOM_Tonga_SCLK_Dependency_Table {
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UCHAR ucRevId;
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UCHAR ucNumEntries; /* Number of entries. */
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ATOM_Tonga_SCLK_Dependency_Record entries[1]; /* Dynamically allocate entries. */
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} ATOM_Tonga_SCLK_Dependency_Table;
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typedef struct _ATOM_Tonga_PCIE_Record {
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UCHAR ucPCIEGenSpeed;
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UCHAR usPCIELaneWidth;
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UCHAR ucReserved[2];
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} ATOM_Tonga_PCIE_Record;
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typedef struct _ATOM_Tonga_PCIE_Table {
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UCHAR ucRevId;
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UCHAR ucNumEntries; /* Number of entries. */
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ATOM_Tonga_PCIE_Record entries[1]; /* Dynamically allocate entries. */
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} ATOM_Tonga_PCIE_Table;
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typedef struct _ATOM_Tonga_MM_Dependency_Record {
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UCHAR ucVddcInd; /* VDDC voltage */
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USHORT usVddgfxOffset; /* Offset relative to VDDC voltage */
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ULONG ulDClk; /* UVD D-clock */
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ULONG ulVClk; /* UVD V-clock */
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ULONG ulEClk; /* VCE clock */
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ULONG ulAClk; /* ACP clock */
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ULONG ulSAMUClk; /* SAMU clock */
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} ATOM_Tonga_MM_Dependency_Record;
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typedef struct _ATOM_Tonga_MM_Dependency_Table {
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UCHAR ucRevId;
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UCHAR ucNumEntries; /* Number of entries. */
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ATOM_Tonga_MM_Dependency_Record entries[1]; /* Dynamically allocate entries. */
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} ATOM_Tonga_MM_Dependency_Table;
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typedef struct _ATOM_Tonga_Voltage_Lookup_Record {
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USHORT usVdd; /* Base voltage */
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USHORT usCACLow;
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USHORT usCACMid;
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USHORT usCACHigh;
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} ATOM_Tonga_Voltage_Lookup_Record;
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typedef struct _ATOM_Tonga_Voltage_Lookup_Table {
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UCHAR ucRevId;
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UCHAR ucNumEntries; /* Number of entries. */
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ATOM_Tonga_Voltage_Lookup_Record entries[1]; /* Dynamically allocate entries. */
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} ATOM_Tonga_Voltage_Lookup_Table;
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typedef struct _ATOM_Tonga_Fan_Table {
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UCHAR ucRevId; /* Change this if the table format changes or version changes so that the other fields are not the same. */
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UCHAR ucTHyst; /* Temperature hysteresis. Integer. */
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USHORT usTMin; /* The temperature, in 0.01 centigrades, below which we just run at a minimal PWM. */
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USHORT usTMed; /* The middle temperature where we change slopes. */
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USHORT usTHigh; /* The high point above TMed for adjusting the second slope. */
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USHORT usPWMMin; /* The minimum PWM value in percent (0.01% increments). */
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USHORT usPWMMed; /* The PWM value (in percent) at TMed. */
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USHORT usPWMHigh; /* The PWM value at THigh. */
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USHORT usTMax; /* The max temperature */
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UCHAR ucFanControlMode; /* Legacy or Fuzzy Fan mode */
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USHORT usFanPWMMax; /* Maximum allowed fan power in percent */
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USHORT usFanOutputSensitivity; /* Sensitivity of fan reaction to temepature changes */
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USHORT usFanRPMMax; /* The default value in RPM */
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ULONG ulMinFanSCLKAcousticLimit; /* Minimum Fan Controller SCLK Frequency Acoustic Limit. */
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UCHAR ucTargetTemperature; /* Advanced fan controller target temperature. */
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UCHAR ucMinimumPWMLimit; /* The minimum PWM that the advanced fan controller can set. This should be set to the highest PWM that will run the fan at its lowest RPM. */
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USHORT usReserved;
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} ATOM_Tonga_Fan_Table;
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typedef struct _ATOM_Fiji_Fan_Table {
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UCHAR ucRevId; /* Change this if the table format changes or version changes so that the other fields are not the same. */
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UCHAR ucTHyst; /* Temperature hysteresis. Integer. */
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USHORT usTMin; /* The temperature, in 0.01 centigrades, below which we just run at a minimal PWM. */
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USHORT usTMed; /* The middle temperature where we change slopes. */
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USHORT usTHigh; /* The high point above TMed for adjusting the second slope. */
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USHORT usPWMMin; /* The minimum PWM value in percent (0.01% increments). */
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USHORT usPWMMed; /* The PWM value (in percent) at TMed. */
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USHORT usPWMHigh; /* The PWM value at THigh. */
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USHORT usTMax; /* The max temperature */
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UCHAR ucFanControlMode; /* Legacy or Fuzzy Fan mode */
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USHORT usFanPWMMax; /* Maximum allowed fan power in percent */
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USHORT usFanOutputSensitivity; /* Sensitivity of fan reaction to temepature changes */
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USHORT usFanRPMMax; /* The default value in RPM */
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ULONG ulMinFanSCLKAcousticLimit; /* Minimum Fan Controller SCLK Frequency Acoustic Limit. */
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UCHAR ucTargetTemperature; /* Advanced fan controller target temperature. */
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UCHAR ucMinimumPWMLimit; /* The minimum PWM that the advanced fan controller can set. This should be set to the highest PWM that will run the fan at its lowest RPM. */
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USHORT usFanGainEdge;
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USHORT usFanGainHotspot;
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USHORT usFanGainLiquid;
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USHORT usFanGainVrVddc;
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USHORT usFanGainVrMvdd;
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USHORT usFanGainPlx;
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USHORT usFanGainHbm;
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USHORT usReserved;
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} ATOM_Fiji_Fan_Table;
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typedef struct _ATOM_Tonga_Thermal_Controller {
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UCHAR ucRevId;
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UCHAR ucType; /* one of ATOM_TONGA_PP_THERMALCONTROLLER_* */
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UCHAR ucI2cLine; /* as interpreted by DAL I2C */
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UCHAR ucI2cAddress;
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UCHAR ucFanParameters; /* Fan Control Parameters. */
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UCHAR ucFanMinRPM; /* Fan Minimum RPM (hundreds) -- for display purposes only. */
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UCHAR ucFanMaxRPM; /* Fan Maximum RPM (hundreds) -- for display purposes only. */
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UCHAR ucReserved;
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UCHAR ucFlags; /* to be defined */
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} ATOM_Tonga_Thermal_Controller;
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typedef struct _ATOM_Tonga_VCE_State_Record {
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UCHAR ucVCEClockIndex; /*index into usVCEDependencyTableOffset of 'ATOM_Tonga_MM_Dependency_Table' type */
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UCHAR ucFlag; /* 2 bits indicates memory p-states */
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UCHAR ucSCLKIndex; /*index into ATOM_Tonga_SCLK_Dependency_Table */
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UCHAR ucMCLKIndex; /*index into ATOM_Tonga_MCLK_Dependency_Table */
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} ATOM_Tonga_VCE_State_Record;
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typedef struct _ATOM_Tonga_VCE_State_Table {
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UCHAR ucRevId;
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UCHAR ucNumEntries;
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ATOM_Tonga_VCE_State_Record entries[1];
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} ATOM_Tonga_VCE_State_Table;
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typedef struct _ATOM_Tonga_PowerTune_Table {
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UCHAR ucRevId;
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USHORT usTDP;
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USHORT usConfigurableTDP;
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USHORT usTDC;
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USHORT usBatteryPowerLimit;
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USHORT usSmallPowerLimit;
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USHORT usLowCACLeakage;
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USHORT usHighCACLeakage;
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USHORT usMaximumPowerDeliveryLimit;
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USHORT usTjMax;
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USHORT usPowerTuneDataSetID;
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USHORT usEDCLimit;
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USHORT usSoftwareShutdownTemp;
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USHORT usClockStretchAmount;
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USHORT usReserve[2];
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} ATOM_Tonga_PowerTune_Table;
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typedef struct _ATOM_Fiji_PowerTune_Table {
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UCHAR ucRevId;
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USHORT usTDP;
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USHORT usConfigurableTDP;
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USHORT usTDC;
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USHORT usBatteryPowerLimit;
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USHORT usSmallPowerLimit;
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USHORT usLowCACLeakage;
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USHORT usHighCACLeakage;
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USHORT usMaximumPowerDeliveryLimit;
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USHORT usTjMax; /* For Fiji, this is also usTemperatureLimitEdge; */
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USHORT usPowerTuneDataSetID;
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USHORT usEDCLimit;
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USHORT usSoftwareShutdownTemp;
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USHORT usClockStretchAmount;
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USHORT usTemperatureLimitHotspot; /*The following are added for Fiji */
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USHORT usTemperatureLimitLiquid1;
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USHORT usTemperatureLimitLiquid2;
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USHORT usTemperatureLimitVrVddc;
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USHORT usTemperatureLimitVrMvdd;
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USHORT usTemperatureLimitPlx;
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UCHAR ucLiquid1_I2C_address; /*Liquid */
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UCHAR ucLiquid2_I2C_address;
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UCHAR ucLiquid_I2C_Line;
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UCHAR ucVr_I2C_address; /*VR */
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UCHAR ucVr_I2C_Line;
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UCHAR ucPlx_I2C_address; /*PLX */
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UCHAR ucPlx_I2C_Line;
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USHORT usReserved;
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} ATOM_Fiji_PowerTune_Table;
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#define ATOM_PPM_A_A 1
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#define ATOM_PPM_A_I 2
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typedef struct _ATOM_Tonga_PPM_Table {
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UCHAR ucRevId;
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UCHAR ucPpmDesign; /*A+I or A+A */
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USHORT usCpuCoreNumber;
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ULONG ulPlatformTDP;
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ULONG ulSmallACPlatformTDP;
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ULONG ulPlatformTDC;
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ULONG ulSmallACPlatformTDC;
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ULONG ulApuTDP;
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ULONG ulDGpuTDP;
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ULONG ulDGpuUlvPower;
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ULONG ulTjmax;
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} ATOM_Tonga_PPM_Table;
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typedef struct _ATOM_Tonga_Hard_Limit_Record {
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ULONG ulSCLKLimit;
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ULONG ulMCLKLimit;
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USHORT usVddcLimit;
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USHORT usVddciLimit;
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USHORT usVddgfxLimit;
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} ATOM_Tonga_Hard_Limit_Record;
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typedef struct _ATOM_Tonga_Hard_Limit_Table {
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UCHAR ucRevId;
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UCHAR ucNumEntries;
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ATOM_Tonga_Hard_Limit_Record entries[1];
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} ATOM_Tonga_Hard_Limit_Table;
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typedef struct _ATOM_Tonga_GPIO_Table {
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UCHAR ucRevId;
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UCHAR ucVRHotTriggeredSclkDpmIndex; /* If VRHot signal is triggered SCLK will be limited to this DPM level */
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UCHAR ucReserve[5];
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} ATOM_Tonga_GPIO_Table;
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typedef struct _PPTable_Generic_SubTable_Header {
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UCHAR ucRevId;
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} PPTable_Generic_SubTable_Header;
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#pragma pack(pop)
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#endif
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