Alexey Kodanev d2bd0831b5 drm/amd/pm: smu7_hwmgr: fix potential off-by-one overflow in 'performance_levels' ... Since 'hardwareActivityPerformanceLevels' is set to the size of the 'performance_levels' array in smu7_hwmgr_backend_init(), using the '<=' assertion to check for the next index value is incorrect. Replace it with '<'. Detected using the static analysis tool - Svace. Fixes: 599a7e9fe1 ("drm/amd/powerplay: implement smu7 hwmgr to manager asics with smu ip version 7.") Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alexey Kodanev <aleksei.kodanev@bell-sw.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2022-10-10 17:32:56 -04:00
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acp
amdgpu	drm/amdgpu: fix SDMA suspend/resume on SR-IOV	2022-10-10 17:32:56 -04:00
amdkfd	drm/amdgpu: Enable F32_WPTR_POLL_ENABLE in mqd	2022-10-06 12:05:44 -04:00
display	drm/amd/display: Fix watermark calculation	2022-10-10 17:32:55 -04:00
include	drm/amdgpu: pass queue size and is_aql_queue to MES	2022-09-29 09:41:44 -04:00
pm	drm/amd/pm: smu7_hwmgr: fix potential off-by-one overflow in 'performance_levels'	2022-10-10 17:32:56 -04:00