forked from Minki/linux
ea3aacf5f2
The SP804 driver statically initialises the cpumask of the clock event device to be cpu_all_mask, which is derived from the compile-time constant NR_CPUS. This breaks SMP_ON_UP systems where the interrupt controller handling the sp804 doesn't have the irq_set_affinity callback on the irq_chip, because the common timer code fails to identify the device as cpu-local and ends up treating it as a broadcast device instead. This patch fixes the problem by using cpu_possible_mask at runtime, which will correctly represent the possible CPUs when SMP_ON_UP is being used. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
192 lines
4.6 KiB
C
192 lines
4.6 KiB
C
/*
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* linux/arch/arm/common/timer-sp.c
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*
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* Copyright (C) 1999 - 2003 ARM Limited
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* Copyright (C) 2000 Deep Blue Solutions Ltd
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/clk.h>
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <asm/sched_clock.h>
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#include <asm/hardware/arm_timer.h>
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static long __init sp804_get_clock_rate(const char *name)
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{
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struct clk *clk;
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long rate;
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int err;
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clk = clk_get_sys("sp804", name);
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if (IS_ERR(clk)) {
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pr_err("sp804: %s clock not found: %d\n", name,
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(int)PTR_ERR(clk));
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return PTR_ERR(clk);
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}
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err = clk_prepare(clk);
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if (err) {
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pr_err("sp804: %s clock failed to prepare: %d\n", name, err);
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clk_put(clk);
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return err;
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}
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err = clk_enable(clk);
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if (err) {
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pr_err("sp804: %s clock failed to enable: %d\n", name, err);
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clk_unprepare(clk);
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clk_put(clk);
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return err;
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}
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rate = clk_get_rate(clk);
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if (rate < 0) {
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pr_err("sp804: %s clock failed to get rate: %ld\n", name, rate);
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clk_disable(clk);
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clk_unprepare(clk);
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clk_put(clk);
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}
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return rate;
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}
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static void __iomem *sched_clock_base;
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static u32 sp804_read(void)
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{
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return ~readl_relaxed(sched_clock_base + TIMER_VALUE);
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}
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void __init __sp804_clocksource_and_sched_clock_init(void __iomem *base,
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const char *name,
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int use_sched_clock)
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{
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long rate = sp804_get_clock_rate(name);
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if (rate < 0)
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return;
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/* setup timer 0 as free-running clocksource */
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writel(0, base + TIMER_CTRL);
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writel(0xffffffff, base + TIMER_LOAD);
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writel(0xffffffff, base + TIMER_VALUE);
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writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC,
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base + TIMER_CTRL);
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clocksource_mmio_init(base + TIMER_VALUE, name,
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rate, 200, 32, clocksource_mmio_readl_down);
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if (use_sched_clock) {
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sched_clock_base = base;
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setup_sched_clock(sp804_read, 32, rate);
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}
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}
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static void __iomem *clkevt_base;
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static unsigned long clkevt_reload;
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/*
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* IRQ handler for the timer
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*/
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static irqreturn_t sp804_timer_interrupt(int irq, void *dev_id)
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{
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struct clock_event_device *evt = dev_id;
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/* clear the interrupt */
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writel(1, clkevt_base + TIMER_INTCLR);
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evt->event_handler(evt);
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return IRQ_HANDLED;
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}
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static void sp804_set_mode(enum clock_event_mode mode,
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struct clock_event_device *evt)
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{
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unsigned long ctrl = TIMER_CTRL_32BIT | TIMER_CTRL_IE;
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writel(ctrl, clkevt_base + TIMER_CTRL);
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switch (mode) {
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case CLOCK_EVT_MODE_PERIODIC:
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writel(clkevt_reload, clkevt_base + TIMER_LOAD);
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ctrl |= TIMER_CTRL_PERIODIC | TIMER_CTRL_ENABLE;
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break;
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case CLOCK_EVT_MODE_ONESHOT:
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/* period set, and timer enabled in 'next_event' hook */
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ctrl |= TIMER_CTRL_ONESHOT;
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break;
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case CLOCK_EVT_MODE_UNUSED:
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case CLOCK_EVT_MODE_SHUTDOWN:
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default:
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break;
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}
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writel(ctrl, clkevt_base + TIMER_CTRL);
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}
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static int sp804_set_next_event(unsigned long next,
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struct clock_event_device *evt)
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{
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unsigned long ctrl = readl(clkevt_base + TIMER_CTRL);
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writel(next, clkevt_base + TIMER_LOAD);
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writel(ctrl | TIMER_CTRL_ENABLE, clkevt_base + TIMER_CTRL);
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return 0;
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}
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static struct clock_event_device sp804_clockevent = {
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.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
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.set_mode = sp804_set_mode,
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.set_next_event = sp804_set_next_event,
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.rating = 300,
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};
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static struct irqaction sp804_timer_irq = {
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.name = "timer",
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.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
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.handler = sp804_timer_interrupt,
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.dev_id = &sp804_clockevent,
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};
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void __init sp804_clockevents_init(void __iomem *base, unsigned int irq,
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const char *name)
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{
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struct clock_event_device *evt = &sp804_clockevent;
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long rate = sp804_get_clock_rate(name);
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if (rate < 0)
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return;
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clkevt_base = base;
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clkevt_reload = DIV_ROUND_CLOSEST(rate, HZ);
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evt->name = name;
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evt->irq = irq;
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evt->cpumask = cpu_possible_mask;
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setup_irq(irq, &sp804_timer_irq);
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clockevents_config_and_register(evt, rate, 0xf, 0xffffffff);
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}
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