379ac9eb1f
Add a custom SoC attribute for Tegra to expose the HIDREV register fields to userspace via the sysfs. This register provides additional details about the type of device (eg, silicon, FPGA, etc) as well as revision. Exposing this information is useful for identifying the exact device revision and device type. For Tegra devices up until Tegra186, the majorrev and minorrev fields of the HIDREV register are used to determine the device revision and device type. For Tegra194, the majorrev and minorrev fields only determine the revision. Starting with Tegra194, there is an additional field, pre_si_platform (which occupies bits 20-23), that now determines device type. Therefore, for all Tegra devices, add a custom SoC attribute for the majorrev and minorrev fields and for Tegra194 add an additional attribute for the pre_si_platform field. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
124 lines
2.9 KiB
C
124 lines
2.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2010 Google, Inc.
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* Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
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*
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* Author:
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* Colin Cross <ccross@android.com>
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*/
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#ifndef __DRIVERS_MISC_TEGRA_FUSE_H
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#define __DRIVERS_MISC_TEGRA_FUSE_H
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#include <linux/dmaengine.h>
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#include <linux/types.h>
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struct nvmem_cell_lookup;
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struct nvmem_device;
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struct tegra_fuse;
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struct tegra_fuse_info {
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u32 (*read)(struct tegra_fuse *fuse, unsigned int offset);
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unsigned int size;
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unsigned int spare;
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};
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struct tegra_fuse_soc {
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void (*init)(struct tegra_fuse *fuse);
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void (*speedo_init)(struct tegra_sku_info *info);
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int (*probe)(struct tegra_fuse *fuse);
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const struct tegra_fuse_info *info;
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const struct nvmem_cell_lookup *lookups;
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unsigned int num_lookups;
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const struct attribute_group *soc_attr_group;
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};
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struct tegra_fuse {
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struct device *dev;
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void __iomem *base;
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phys_addr_t phys;
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struct clk *clk;
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u32 (*read_early)(struct tegra_fuse *fuse, unsigned int offset);
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u32 (*read)(struct tegra_fuse *fuse, unsigned int offset);
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const struct tegra_fuse_soc *soc;
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/* APBDMA on Tegra20 */
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struct {
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struct mutex lock;
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struct completion wait;
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struct dma_chan *chan;
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struct dma_slave_config config;
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dma_addr_t phys;
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u32 *virt;
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} apbdma;
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struct nvmem_device *nvmem;
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struct nvmem_cell_lookup *lookups;
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};
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void tegra_init_revision(void);
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void tegra_init_apbmisc(void);
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bool __init tegra_fuse_read_spare(unsigned int spare);
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u32 __init tegra_fuse_read_early(unsigned int offset);
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u8 tegra_get_major_rev(void);
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u8 tegra_get_minor_rev(void);
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extern const struct attribute_group tegra_soc_attr_group;
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#ifdef CONFIG_ARCH_TEGRA_2x_SOC
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void tegra20_init_speedo_data(struct tegra_sku_info *sku_info);
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#endif
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#ifdef CONFIG_ARCH_TEGRA_3x_SOC
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void tegra30_init_speedo_data(struct tegra_sku_info *sku_info);
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#endif
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#ifdef CONFIG_ARCH_TEGRA_114_SOC
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void tegra114_init_speedo_data(struct tegra_sku_info *sku_info);
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#endif
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#if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)
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void tegra124_init_speedo_data(struct tegra_sku_info *sku_info);
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#endif
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#ifdef CONFIG_ARCH_TEGRA_210_SOC
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void tegra210_init_speedo_data(struct tegra_sku_info *sku_info);
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#endif
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#ifdef CONFIG_ARCH_TEGRA_2x_SOC
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extern const struct tegra_fuse_soc tegra20_fuse_soc;
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#endif
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#ifdef CONFIG_ARCH_TEGRA_3x_SOC
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extern const struct tegra_fuse_soc tegra30_fuse_soc;
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#endif
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#ifdef CONFIG_ARCH_TEGRA_114_SOC
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extern const struct tegra_fuse_soc tegra114_fuse_soc;
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#endif
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#if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)
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extern const struct tegra_fuse_soc tegra124_fuse_soc;
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#endif
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#ifdef CONFIG_ARCH_TEGRA_210_SOC
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extern const struct tegra_fuse_soc tegra210_fuse_soc;
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#endif
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#ifdef CONFIG_ARCH_TEGRA_186_SOC
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extern const struct tegra_fuse_soc tegra186_fuse_soc;
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#endif
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#ifdef CONFIG_ARCH_TEGRA_194_SOC
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extern const struct tegra_fuse_soc tegra194_fuse_soc;
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extern const struct attribute_group tegra194_soc_attr_group;
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#endif
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#endif
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