5c9fa16e8a
ISA v3.1 does not support the SAO storage control attribute required to implement PROT_SAO. PROT_SAO was used by specialised system software (Lx86) that has been discontinued for about 7 years, and is not thought to be used elsewhere, so removal should not cause problems. We rather remove it than keep support for older processors, because live migrating guest partitions to newer processors may not be possible if SAO is in use (or worse allowed with silent races). - PROT_SAO stays in the uapi header so code using it would still build. - arch_validate_prot() is removed, the generic version rejects PROT_SAO so applications would get a failure at mmap() time. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> [mpe: Drop KVM change for the time being] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20200703011958.1166620-3-npiggin@gmail.com
317 lines
8.2 KiB
C
317 lines
8.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_POWERPC_NOHASH_64_PGTABLE_H
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#define _ASM_POWERPC_NOHASH_64_PGTABLE_H
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/*
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* This file contains the functions and defines necessary to modify and use
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* the ppc64 non-hashed page table.
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*/
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#include <asm/nohash/64/pgtable-4k.h>
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#include <asm/barrier.h>
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#include <asm/asm-const.h>
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#define FIRST_USER_ADDRESS 0UL
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/*
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* Size of EA range mapped by our pagetables.
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*/
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#define PGTABLE_EADDR_SIZE (PTE_INDEX_SIZE + PMD_INDEX_SIZE + \
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PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT)
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#define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE)
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#define PMD_CACHE_INDEX PMD_INDEX_SIZE
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#define PUD_CACHE_INDEX PUD_INDEX_SIZE
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/*
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* Define the address range of the kernel non-linear virtual area
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*/
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#define KERN_VIRT_START ASM_CONST(0x8000000000000000)
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#define KERN_VIRT_SIZE ASM_CONST(0x0000100000000000)
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/*
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* The vmalloc space starts at the beginning of that region, and
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* occupies a quarter of it on Book3E
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* (we keep a quarter for the virtual memmap)
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*/
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#define VMALLOC_START KERN_VIRT_START
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#define VMALLOC_SIZE (KERN_VIRT_SIZE >> 2)
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#define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE)
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/*
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* The second half of the kernel virtual space is used for IO mappings,
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* it's itself carved into the PIO region (ISA and PHB IO space) and
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* the ioremap space
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*
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* ISA_IO_BASE = KERN_IO_START, 64K reserved area
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* PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces
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* IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE
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*/
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#define KERN_IO_START (KERN_VIRT_START + (KERN_VIRT_SIZE >> 1))
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#define FULL_IO_SIZE 0x80000000ul
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#define ISA_IO_BASE (KERN_IO_START)
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#define ISA_IO_END (KERN_IO_START + 0x10000ul)
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#define PHB_IO_BASE (ISA_IO_END)
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#define PHB_IO_END (KERN_IO_START + FULL_IO_SIZE)
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#define IOREMAP_BASE (PHB_IO_END)
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#define IOREMAP_START (ioremap_bot)
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#define IOREMAP_END (KERN_VIRT_START + KERN_VIRT_SIZE)
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/*
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* Region IDs
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*/
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#define REGION_SHIFT 60UL
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#define REGION_MASK (0xfUL << REGION_SHIFT)
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#define REGION_ID(ea) (((unsigned long)(ea)) >> REGION_SHIFT)
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#define VMALLOC_REGION_ID (REGION_ID(VMALLOC_START))
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#define KERNEL_REGION_ID (REGION_ID(PAGE_OFFSET))
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#define USER_REGION_ID (0UL)
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/*
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* Defines the address of the vmemap area, in its own region on
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* after the vmalloc space on Book3E
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*/
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#define VMEMMAP_BASE VMALLOC_END
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#define VMEMMAP_END KERN_IO_START
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#define vmemmap ((struct page *)VMEMMAP_BASE)
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/*
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* Include the PTE bits definitions
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*/
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#include <asm/nohash/pte-book3e.h>
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#define PTE_RPN_MASK (~((1UL << PTE_RPN_SHIFT) - 1))
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/*
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* _PAGE_CHG_MASK masks of bits that are to be preserved across
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* pgprot changes.
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*/
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#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_SPECIAL)
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#define H_PAGE_4K_PFN 0
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#ifndef __ASSEMBLY__
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/* pte_clear moved to later in this file */
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static inline pte_t pte_mkwrite(pte_t pte)
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{
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return __pte(pte_val(pte) | _PAGE_RW);
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}
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static inline pte_t pte_mkdirty(pte_t pte)
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{
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return __pte(pte_val(pte) | _PAGE_DIRTY);
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}
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static inline pte_t pte_mkyoung(pte_t pte)
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{
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return __pte(pte_val(pte) | _PAGE_ACCESSED);
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}
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static inline pte_t pte_wrprotect(pte_t pte)
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{
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return __pte(pte_val(pte) & ~_PAGE_RW);
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}
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static inline pte_t pte_mkexec(pte_t pte)
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{
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return __pte(pte_val(pte) | _PAGE_EXEC);
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}
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#define PMD_BAD_BITS (PTE_TABLE_SIZE-1)
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#define PUD_BAD_BITS (PMD_TABLE_SIZE-1)
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static inline void pmd_set(pmd_t *pmdp, unsigned long val)
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{
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*pmdp = __pmd(val);
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}
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static inline void pmd_clear(pmd_t *pmdp)
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{
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*pmdp = __pmd(0);
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}
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static inline pte_t pmd_pte(pmd_t pmd)
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{
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return __pte(pmd_val(pmd));
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}
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#define pmd_none(pmd) (!pmd_val(pmd))
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#define pmd_bad(pmd) (!is_kernel_addr(pmd_val(pmd)) \
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|| (pmd_val(pmd) & PMD_BAD_BITS))
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#define pmd_present(pmd) (!pmd_none(pmd))
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#define pmd_page_vaddr(pmd) (pmd_val(pmd) & ~PMD_MASKED_BITS)
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extern struct page *pmd_page(pmd_t pmd);
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static inline void pud_set(pud_t *pudp, unsigned long val)
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{
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*pudp = __pud(val);
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}
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static inline void pud_clear(pud_t *pudp)
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{
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*pudp = __pud(0);
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}
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#define pud_none(pud) (!pud_val(pud))
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#define pud_bad(pud) (!is_kernel_addr(pud_val(pud)) \
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|| (pud_val(pud) & PUD_BAD_BITS))
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#define pud_present(pud) (pud_val(pud) != 0)
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#define pud_page_vaddr(pud) (pud_val(pud) & ~PUD_MASKED_BITS)
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extern struct page *pud_page(pud_t pud);
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static inline pte_t pud_pte(pud_t pud)
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{
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return __pte(pud_val(pud));
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}
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static inline pud_t pte_pud(pte_t pte)
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{
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return __pud(pte_val(pte));
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}
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#define pud_write(pud) pte_write(pud_pte(pud))
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#define p4d_write(pgd) pte_write(p4d_pte(p4d))
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static inline void p4d_set(p4d_t *p4dp, unsigned long val)
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{
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*p4dp = __p4d(val);
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}
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/* Atomic PTE updates */
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static inline unsigned long pte_update(struct mm_struct *mm,
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unsigned long addr,
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pte_t *ptep, unsigned long clr,
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unsigned long set,
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int huge)
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{
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unsigned long old = pte_val(*ptep);
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*ptep = __pte((old & ~clr) | set);
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/* huge pages use the old page table lock */
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if (!huge)
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assert_pte_locked(mm, addr);
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return old;
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}
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static inline int pte_young(pte_t pte)
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{
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return pte_val(pte) & _PAGE_ACCESSED;
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}
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static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
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unsigned long addr, pte_t *ptep)
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{
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unsigned long old;
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if (pte_young(*ptep))
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return 0;
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old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0, 0);
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return (old & _PAGE_ACCESSED) != 0;
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}
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#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
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#define ptep_test_and_clear_young(__vma, __addr, __ptep) \
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({ \
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int __r; \
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__r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \
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__r; \
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})
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#define __HAVE_ARCH_PTEP_SET_WRPROTECT
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static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
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pte_t *ptep)
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{
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if ((pte_val(*ptep) & _PAGE_RW) == 0)
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return;
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pte_update(mm, addr, ptep, _PAGE_RW, 0, 0);
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}
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#define __HAVE_ARCH_HUGE_PTEP_SET_WRPROTECT
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static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
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unsigned long addr, pte_t *ptep)
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{
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if ((pte_val(*ptep) & _PAGE_RW) == 0)
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return;
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pte_update(mm, addr, ptep, _PAGE_RW, 0, 1);
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}
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#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
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#define ptep_clear_flush_young(__vma, __address, __ptep) \
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({ \
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int __young = __ptep_test_and_clear_young((__vma)->vm_mm, __address, \
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__ptep); \
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__young; \
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})
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#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
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static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
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unsigned long addr, pte_t *ptep)
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{
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unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0, 0);
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return __pte(old);
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}
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static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
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pte_t * ptep)
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{
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pte_update(mm, addr, ptep, ~0UL, 0, 0);
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}
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/* Set the dirty and/or accessed bits atomically in a linux PTE */
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static inline void __ptep_set_access_flags(struct vm_area_struct *vma,
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pte_t *ptep, pte_t entry,
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unsigned long address,
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int psize)
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{
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unsigned long bits = pte_val(entry) &
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(_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);
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unsigned long old = pte_val(*ptep);
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*ptep = __pte(old | bits);
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flush_tlb_page(vma, address);
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}
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#define __HAVE_ARCH_PTE_SAME
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#define pte_same(A,B) ((pte_val(A) ^ pte_val(B)) == 0)
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#define pte_ERROR(e) \
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pr_err("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
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#define pmd_ERROR(e) \
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pr_err("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
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#define pgd_ERROR(e) \
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pr_err("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
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/* Encode and de-code a swap entry */
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#define MAX_SWAPFILES_CHECK() do { \
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BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS); \
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} while (0)
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#define SWP_TYPE_BITS 5
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#define __swp_type(x) (((x).val >> _PAGE_BIT_SWAP_TYPE) \
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& ((1UL << SWP_TYPE_BITS) - 1))
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#define __swp_offset(x) ((x).val >> PTE_RPN_SHIFT)
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#define __swp_entry(type, offset) ((swp_entry_t) { \
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((type) << _PAGE_BIT_SWAP_TYPE) \
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| ((offset) << PTE_RPN_SHIFT) })
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#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) })
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#define __swp_entry_to_pte(x) __pte((x).val)
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int map_kernel_page(unsigned long ea, unsigned long pa, pgprot_t prot);
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extern int __meminit vmemmap_create_mapping(unsigned long start,
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unsigned long page_size,
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unsigned long phys);
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extern void vmemmap_remove_mapping(unsigned long start,
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unsigned long page_size);
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#endif /* __ASSEMBLY__ */
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#endif /* _ASM_POWERPC_NOHASH_64_PGTABLE_H */
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