2874c5fd28
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
64 lines
2.0 KiB
C
64 lines
2.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* include/asm-mips/dec/kn02ba.h
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*
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* DECstation 5000/1xx (3min or KN02-BA) definitions.
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*
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* Copyright (C) 2002, 2003 Maciej W. Rozycki
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*/
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#ifndef __ASM_MIPS_DEC_KN02BA_H
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#define __ASM_MIPS_DEC_KN02BA_H
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#include <asm/dec/kn02xa.h> /* For common definitions. */
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/*
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* CPU interrupt bits.
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*/
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#define KN02BA_CPU_INR_HALT 6 /* HALT button */
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#define KN02BA_CPU_INR_CASCADE 5 /* I/O ASIC cascade */
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#define KN02BA_CPU_INR_TC2 4 /* TURBOchannel slot #2 */
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#define KN02BA_CPU_INR_TC1 3 /* TURBOchannel slot #1 */
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#define KN02BA_CPU_INR_TC0 2 /* TURBOchannel slot #0 */
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/*
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* I/O ASIC interrupt bits. Star marks denote non-IRQ status bits.
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*/
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#define KN02BA_IO_INR_RES_15 15 /* unused */
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#define KN02BA_IO_INR_NVRAM 14 /* (*) NVRAM clear jumper */
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#define KN02BA_IO_INR_RES_13 13 /* unused */
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#define KN02BA_IO_INR_BUS 12 /* memory, I/O bus read/write errors */
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#define KN02BA_IO_INR_RES_11 11 /* unused */
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#define KN02BA_IO_INR_NRMOD 10 /* (*) NRMOD manufacturing jumper */
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#define KN02BA_IO_INR_ASC 9 /* ASC (NCR53C94) SCSI */
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#define KN02BA_IO_INR_LANCE 8 /* LANCE (Am7990) Ethernet */
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#define KN02BA_IO_INR_SCC1 7 /* SCC (Z85C30) serial #1 */
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#define KN02BA_IO_INR_SCC0 6 /* SCC (Z85C30) serial #0 */
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#define KN02BA_IO_INR_RTC 5 /* DS1287 RTC */
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#define KN02BA_IO_INR_PSU 4 /* power supply unit warning */
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#define KN02BA_IO_INR_RES_3 3 /* unused */
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#define KN02BA_IO_INR_ASC_DATA 2 /* SCSI data ready (for PIO) */
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#define KN02BA_IO_INR_PBNC 1 /* ~HALT button debouncer */
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#define KN02BA_IO_INR_PBNO 0 /* HALT button debouncer */
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/*
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* Memory Error Register bits.
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*/
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#define KN02BA_MER_RES_27 (1<<27) /* unused */
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/*
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* Memory Size Register bits.
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*/
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#define KN02BA_MSR_RES_17 (0x3ff<<17) /* unused */
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/*
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* I/O ASIC System Support Register bits.
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*/
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#define KN02BA_IO_SSR_TXDIS1 (1<<14) /* SCC1 transmit disable */
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#define KN02BA_IO_SSR_TXDIS0 (1<<13) /* SCC0 transmit disable */
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#define KN02BA_IO_SSR_RES_12 (1<<12) /* unused */
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#define KN02BA_IO_SSR_LEDS (0xff<<0) /* ~diagnostic LEDs */
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#endif /* __ASM_MIPS_DEC_KN02BA_H */
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