- Convert /reserved-memory bindings to schemas - Convert a bunch of NFC bindings to schemas - Convert bindings to schema: Xilinx USB, Freescale DDR controller, Arm CCI-400, UBlox Neo-6M, 1-Wire GPIO, MSI controller, ASpeed LPC, OMAP and Inside-Secure HWRNG, register-bit-led, OV5640, Silead GSL1680, Elan ekth3000, Marvell bluetooth, TI wlcore, TI bluetooth, ESP ESP8089, tlm,trusted-foundations, Microchip cap11xx, Ralink SoCs and boards, and TI sysc - New binding schemas for: msi-ranges, Aspeed UART routing controller, palmbus, Xylon LogiCVC display controller, Mediatek's MT7621 SDRAM memory controller, and Apple M1 PCIe host - Run schema checks for %.dtb targets - Improve build time when using DT_SCHEMA_FILES - Improve error message when dtschema is not found - Various doc reference fixes in MAINTAINERS - Convert architectures to common CPU h/w ID parsing function of_get_cpu_hwid(). - Allow for empty NUMA node IDs which may be hotplugged - Cleanup of __fdt_scan_reserved_mem() - Constify device_node parameters - Update dtc to upstream v1.6.1-19-g0a3a9d3449c8. Adds new checks 'node_name_vs_property_name' and 'interrupt_map'. - Enable dtc 'unit_address_format' warning by default - Fix unittest EXPECT text for gpio hog errors -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmGBrj8QHHJvYmhAa2Vy bmVsLm9yZwAKCRD6+121jbxhw3M1D/9gpaVBqp+Q5hZZLWOjz/WkAsExZ71N/8Lh rn64XWYQNJ6R1PINkBtlooJy6wTCIMfNs3IEmkAVEXVEj1Nvu7uEZwYbb96B4dJ4 EiMv/Vz0EphoqnBvICT86XfNZduP1sZ5M11pdv2dNvwJrEvvi98VLDvSucvxorn8 sm5jsqWOAwroiCR+u8BWW3qH3sugL1BOAwraMoUbosZAo0SpNH4WBdcBz4+v8lUS 5N8Y8Q6dB6fEqdbVpzMblN2B9c/TEb1VYaeGXRUyQsIUQJajX3xnR8RDnTKLBtsS FAKGQORemLwVzBVKeZKbhlqXAJbl701LuKHRLiVerb9UGi+tk4AX9Rgg1Whrp7w4 UYi+k4Ozus1vDaKsemB1voabSgYYY+aNTRezltdtPz0a+eQJWPUt1xQB5m68cGO4 TZI+KfExxyGVa8iDgv4AWhvXqbR3+PUTUvel2xEIkRscWmMjXF/+oQXy8QYn2Aok S9750/3EUQCbKi9ZUjPLRzd5CuPP2E97i8V2WdOgRse3+H7pPg5IcEq7oQYe9A62 SnRFjPz1X5g4Hh3bRVmcAGmDzbZJrl9dULvYVdiUWiqzfmHxN7MXO9FIxv3NKVfp 6jgr5vVVi1ShDnCh3ns4mYUwQ7j72dsONyklbVBbNtGjeeZcv5MEeg9ZAoVvO+lh 9DNNSGSd2g== =dQa6 -----END PGP SIGNATURE----- Merge tag 'devicetree-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: - Convert /reserved-memory bindings to schemas - Convert a bunch of NFC bindings to schemas - Convert bindings to schema: Xilinx USB, Freescale DDR controller, Arm CCI-400, UBlox Neo-6M, 1-Wire GPIO, MSI controller, ASpeed LPC, OMAP and Inside-Secure HWRNG, register-bit-led, OV5640, Silead GSL1680, Elan ekth3000, Marvell bluetooth, TI wlcore, TI bluetooth, ESP ESP8089, tlm,trusted-foundations, Microchip cap11xx, Ralink SoCs and boards, and TI sysc - New binding schemas for: msi-ranges, Aspeed UART routing controller, palmbus, Xylon LogiCVC display controller, Mediatek's MT7621 SDRAM memory controller, and Apple M1 PCIe host - Run schema checks for %.dtb targets - Improve build time when using DT_SCHEMA_FILES - Improve error message when dtschema is not found - Various doc reference fixes in MAINTAINERS - Convert architectures to common CPU h/w ID parsing function of_get_cpu_hwid(). - Allow for empty NUMA node IDs which may be hotplugged - Cleanup of __fdt_scan_reserved_mem() - Constify device_node parameters - Update dtc to upstream v1.6.1-19-g0a3a9d3449c8. Adds new checks 'node_name_vs_property_name' and 'interrupt_map'. - Enable dtc 'unit_address_format' warning by default - Fix unittest EXPECT text for gpio hog errors * tag 'devicetree-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (97 commits) dt-bindings: net: ti,bluetooth: Document default max-speed dt-bindings: pci: rcar-pci-ep: Document r8a7795 dt-bindings: net: qcom,ipa: IPA does support up to two iommus of/fdt: Remove of_scan_flat_dt() usage for __fdt_scan_reserved_mem() of: unittest: document intentional interrupt-map provider build warning of: unittest: fix EXPECT text for gpio hog errors of/unittest: Disable new dtc node_name_vs_property_name and interrupt_map warnings scripts/dtc: Update to upstream version v1.6.1-19-g0a3a9d3449c8 dt-bindings: arm: firmware: tlm,trusted-foundations: Convert txt bindings to yaml dt-bindings: display: tilcd: Fix endpoint addressing in example dt-bindings: input: microchip,cap11xx: Convert txt bindings to yaml dt-bindings: ufs: exynos-ufs: add exynosautov9 compatible dt-bindings: ufs: exynos-ufs: add io-coherency property dt-bindings: mips: convert Ralink SoCs and boards to schema dt-bindings: display: xilinx: Fix example with psgtr dt-bindings: net: nfc: nxp,pn544: Convert txt bindings to yaml dt-bindings: Add a help message when dtschema tools are missing dt-bindings: bus: ti-sysc: Update to use yaml binding dt-bindings: sram: Allow numbers in sram region node name dt-bindings: display: Document the Xylon LogiCVC display controller ...
		
			
				
	
	
		
			320 lines
		
	
	
		
			6.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			320 lines
		
	
	
		
			6.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0
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| /*
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|  * Architecture specific OF callbacks.
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|  */
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| #include <linux/export.h>
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| #include <linux/io.h>
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| #include <linux/interrupt.h>
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| #include <linux/list.h>
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| #include <linux/of.h>
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| #include <linux/of_fdt.h>
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| #include <linux/of_address.h>
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| #include <linux/of_platform.h>
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| #include <linux/of_irq.h>
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| #include <linux/libfdt.h>
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| #include <linux/slab.h>
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| #include <linux/pci.h>
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| #include <linux/of_pci.h>
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| #include <linux/initrd.h>
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| 
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| #include <asm/irqdomain.h>
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| #include <asm/hpet.h>
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| #include <asm/apic.h>
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| #include <asm/io_apic.h>
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| #include <asm/pci_x86.h>
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| #include <asm/setup.h>
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| #include <asm/i8259.h>
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| #include <asm/prom.h>
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| 
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| __initdata u64 initial_dtb;
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| char __initdata cmd_line[COMMAND_LINE_SIZE];
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| 
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| int __initdata of_ioapic;
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| 
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| void __init early_init_dt_add_memory_arch(u64 base, u64 size)
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| {
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| 	BUG();
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| }
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| 
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| void __init add_dtb(u64 data)
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| {
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| 	initial_dtb = data + offsetof(struct setup_data, data);
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| }
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| 
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| /*
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|  * CE4100 ids. Will be moved to machine_device_initcall() once we have it.
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|  */
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| static struct of_device_id __initdata ce4100_ids[] = {
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| 	{ .compatible = "intel,ce4100-cp", },
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| 	{ .compatible = "isa", },
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| 	{ .compatible = "pci", },
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| 	{},
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| };
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| 
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| static int __init add_bus_probe(void)
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| {
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| 	if (!of_have_populated_dt())
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| 		return 0;
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| 
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| 	return of_platform_bus_probe(NULL, ce4100_ids, NULL);
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| }
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| device_initcall(add_bus_probe);
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| 
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| #ifdef CONFIG_PCI
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| struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus)
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| {
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| 	struct device_node *np;
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| 
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| 	for_each_node_by_type(np, "pci") {
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| 		const void *prop;
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| 		unsigned int bus_min;
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| 
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| 		prop = of_get_property(np, "bus-range", NULL);
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| 		if (!prop)
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| 			continue;
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| 		bus_min = be32_to_cpup(prop);
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| 		if (bus->number == bus_min)
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| 			return np;
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| 	}
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| 	return NULL;
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| }
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| 
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| static int x86_of_pci_irq_enable(struct pci_dev *dev)
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| {
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| 	u32 virq;
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| 	int ret;
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| 	u8 pin;
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| 
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| 	ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
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| 	if (ret)
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| 		return ret;
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| 	if (!pin)
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| 		return 0;
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| 
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| 	virq = of_irq_parse_and_map_pci(dev, 0, 0);
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| 	if (virq == 0)
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| 		return -EINVAL;
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| 	dev->irq = virq;
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| 	return 0;
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| }
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| 
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| static void x86_of_pci_irq_disable(struct pci_dev *dev)
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| {
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| }
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| 
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| void x86_of_pci_init(void)
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| {
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| 	pcibios_enable_irq = x86_of_pci_irq_enable;
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| 	pcibios_disable_irq = x86_of_pci_irq_disable;
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| }
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| #endif
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| 
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| static void __init dtb_setup_hpet(void)
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| {
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| #ifdef CONFIG_HPET_TIMER
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| 	struct device_node *dn;
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| 	struct resource r;
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| 	int ret;
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| 
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| 	dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet");
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| 	if (!dn)
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| 		return;
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| 	ret = of_address_to_resource(dn, 0, &r);
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| 	if (ret) {
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| 		WARN_ON(1);
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| 		return;
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| 	}
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| 	hpet_address = r.start;
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| #endif
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| }
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| 
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| #ifdef CONFIG_X86_LOCAL_APIC
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| 
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| static void __init dtb_cpu_setup(void)
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| {
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| 	struct device_node *dn;
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| 	u32 apic_id, version;
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| 
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| 	version = GET_APIC_VERSION(apic_read(APIC_LVR));
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| 	for_each_of_cpu_node(dn) {
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| 		apic_id = of_get_cpu_hwid(dn, 0);
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| 		if (apic_id == ~0U) {
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| 			pr_warn("%pOF: missing local APIC ID\n", dn);
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| 			continue;
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| 		}
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| 		generic_processor_info(apic_id, version);
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| 	}
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| }
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| 
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| static void __init dtb_lapic_setup(void)
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| {
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| 	struct device_node *dn;
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| 	struct resource r;
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| 	unsigned long lapic_addr = APIC_DEFAULT_PHYS_BASE;
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| 	int ret;
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| 
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| 	dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic");
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| 	if (dn) {
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| 		ret = of_address_to_resource(dn, 0, &r);
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| 		if (WARN_ON(ret))
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| 			return;
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| 		lapic_addr = r.start;
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| 	}
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| 
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| 	/* Did the boot loader setup the local APIC ? */
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| 	if (!boot_cpu_has(X86_FEATURE_APIC)) {
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| 		if (apic_force_enable(lapic_addr))
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| 			return;
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| 	}
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| 	smp_found_config = 1;
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| 	pic_mode = 1;
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| 	register_lapic_address(lapic_addr);
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| }
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| 
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| #endif /* CONFIG_X86_LOCAL_APIC */
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| 
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| #ifdef CONFIG_X86_IO_APIC
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| static unsigned int ioapic_id;
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| 
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| struct of_ioapic_type {
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| 	u32 out_type;
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| 	u32 is_level;
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| 	u32 active_low;
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| };
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| 
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| static struct of_ioapic_type of_ioapic_type[] =
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| {
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| 	{
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| 		.out_type	= IRQ_TYPE_EDGE_FALLING,
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| 		.is_level	= 0,
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| 		.active_low	= 1,
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| 	},
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| 	{
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| 		.out_type	= IRQ_TYPE_LEVEL_HIGH,
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| 		.is_level	= 1,
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| 		.active_low	= 0,
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| 	},
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| 	{
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| 		.out_type	= IRQ_TYPE_LEVEL_LOW,
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| 		.is_level	= 1,
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| 		.active_low	= 1,
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| 	},
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| 	{
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| 		.out_type	= IRQ_TYPE_EDGE_RISING,
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| 		.is_level	= 0,
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| 		.active_low	= 0,
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| 	},
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| };
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| 
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| static int dt_irqdomain_alloc(struct irq_domain *domain, unsigned int virq,
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| 			      unsigned int nr_irqs, void *arg)
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| {
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| 	struct irq_fwspec *fwspec = (struct irq_fwspec *)arg;
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| 	struct of_ioapic_type *it;
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| 	struct irq_alloc_info tmp;
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| 	int type_index;
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| 
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| 	if (WARN_ON(fwspec->param_count < 2))
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| 		return -EINVAL;
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| 
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| 	type_index = fwspec->param[1];
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| 	if (type_index >= ARRAY_SIZE(of_ioapic_type))
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| 		return -EINVAL;
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| 
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| 	it = &of_ioapic_type[type_index];
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| 	ioapic_set_alloc_attr(&tmp, NUMA_NO_NODE, it->is_level, it->active_low);
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| 	tmp.devid = mpc_ioapic_id(mp_irqdomain_ioapic_idx(domain));
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| 	tmp.ioapic.pin = fwspec->param[0];
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| 
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| 	return mp_irqdomain_alloc(domain, virq, nr_irqs, &tmp);
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| }
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| 
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| static const struct irq_domain_ops ioapic_irq_domain_ops = {
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| 	.alloc		= dt_irqdomain_alloc,
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| 	.free		= mp_irqdomain_free,
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| 	.activate	= mp_irqdomain_activate,
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| 	.deactivate	= mp_irqdomain_deactivate,
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| };
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| 
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| static void __init dtb_add_ioapic(struct device_node *dn)
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| {
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| 	struct resource r;
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| 	int ret;
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| 	struct ioapic_domain_cfg cfg = {
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| 		.type = IOAPIC_DOMAIN_DYNAMIC,
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| 		.ops = &ioapic_irq_domain_ops,
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| 		.dev = dn,
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| 	};
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| 
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| 	ret = of_address_to_resource(dn, 0, &r);
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| 	if (ret) {
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| 		printk(KERN_ERR "Can't obtain address from device node %pOF.\n", dn);
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| 		return;
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| 	}
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| 	mp_register_ioapic(++ioapic_id, r.start, gsi_top, &cfg);
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| }
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| 
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| static void __init dtb_ioapic_setup(void)
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| {
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| 	struct device_node *dn;
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| 
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| 	for_each_compatible_node(dn, NULL, "intel,ce4100-ioapic")
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| 		dtb_add_ioapic(dn);
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| 
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| 	if (nr_ioapics) {
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| 		of_ioapic = 1;
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| 		return;
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| 	}
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| 	printk(KERN_ERR "Error: No information about IO-APIC in OF.\n");
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| }
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| #else
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| static void __init dtb_ioapic_setup(void) {}
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| #endif
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| 
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| static void __init dtb_apic_setup(void)
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| {
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| #ifdef CONFIG_X86_LOCAL_APIC
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| 	dtb_lapic_setup();
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| 	dtb_cpu_setup();
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| #endif
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| 	dtb_ioapic_setup();
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| }
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| 
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| #ifdef CONFIG_OF_EARLY_FLATTREE
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| static void __init x86_flattree_get_config(void)
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| {
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| 	u32 size, map_len;
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| 	void *dt;
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| 
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| 	if (!initial_dtb)
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| 		return;
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| 
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| 	map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK), (u64)128);
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| 
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| 	dt = early_memremap(initial_dtb, map_len);
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| 	size = fdt_totalsize(dt);
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| 	if (map_len < size) {
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| 		early_memunmap(dt, map_len);
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| 		dt = early_memremap(initial_dtb, size);
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| 		map_len = size;
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| 	}
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| 
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| 	early_init_dt_verify(dt);
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| 	unflatten_and_copy_device_tree();
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| 	early_memunmap(dt, map_len);
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| }
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| #else
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| static inline void x86_flattree_get_config(void) { }
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| #endif
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| 
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| void __init x86_dtb_init(void)
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| {
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| 	x86_flattree_get_config();
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| 
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| 	if (!of_have_populated_dt())
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| 		return;
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| 
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| 	dtb_setup_hpet();
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| 	dtb_apic_setup();
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| }
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