linux/drivers/gpu
Imre Deak d1e082ffb8 drm/i915/bxt: Fix GRC code register field definitions
This has been corrected in BSpec quite some time ago, but we missed it
somehow. The wrong field definitions resulted in configuring PHY0 with
an incorrect GRC value.

v2:
- Remove the FIXME comment, we left in the code exactly about this
  issue. (Ville)

CC: Arthur J Runyan <arthur.j.runyan@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1459515767-29228-3-git-send-email-imre.deak@intel.com
2016-04-15 14:18:16 +03:00
..
drm drm/i915/bxt: Fix GRC code register field definitions 2016-04-15 14:18:16 +03:00
host1x Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux 2016-03-21 13:48:00 -07:00
ipu-v3 gpu: ipu-v3: ipu-dmfc: Rename ipu_dmfc_init_channel to ipu_dmfc_config_wait4eot 2016-03-31 11:24:33 +02:00
vga vga_switcheroo: Add support for switching only the DDC 2016-02-09 11:21:07 +01:00
Makefile