forked from Minki/linux
d1157b1074
Correct comments across ptrace(2) handlers about an FPU register context
layout discrepancy between MIPS I and later ISAs, which was fixed with
`linux-mips.org' (LMO) commit 42533948caac ("Major pile of FP emulator
changes."), the fix corrected with LMO commit 849fa7a50dff ("R3k FPU
ptrace() handling fixes."), and then broken and fixed over and over
again, until last time fixed with commit 80cbfad790 ("MIPS: Correct
MIPS I FP context layout").
NB running the GDB test suite for the relevant ABI/ISA and watching out
for regressions is advisable when poking around ptrace(2).
Signed-off-by: Maciej W. Rozycki <macro@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/19326/
Signed-off-by: James Hogan <jhogan@kernel.org>
312 lines
7.3 KiB
C
312 lines
7.3 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1992 Ross Biro
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* Copyright (C) Linus Torvalds
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* Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
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* Copyright (C) 1996 David S. Miller
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* Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
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* Copyright (C) 1999 MIPS Technologies, Inc.
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* Copyright (C) 2000 Ulf Carlsson
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*
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* At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
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* binaries.
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*/
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#include <linux/compiler.h>
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#include <linux/compat.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/sched/task_stack.h>
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#include <linux/mm.h>
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#include <linux/errno.h>
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#include <linux/ptrace.h>
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#include <linux/smp.h>
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#include <linux/security.h>
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#include <asm/cpu.h>
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#include <asm/dsp.h>
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#include <asm/fpu.h>
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#include <asm/mipsregs.h>
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#include <asm/mipsmtregs.h>
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#include <asm/pgtable.h>
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#include <asm/page.h>
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#include <asm/reg.h>
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#include <asm/syscall.h>
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#include <linux/uaccess.h>
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#include <asm/bootinfo.h>
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/*
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* Tracing a 32-bit process with a 64-bit strace and vice versa will not
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* work. I don't know how to fix this.
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*/
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long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
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compat_ulong_t caddr, compat_ulong_t cdata)
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{
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int addr = caddr;
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int data = cdata;
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int ret;
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switch (request) {
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/*
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* Read 4 bytes of the other process' storage
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* data is a pointer specifying where the user wants the
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* 4 bytes copied into
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* addr is a pointer in the user's storage that contains an 8 byte
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* address in the other process of the 4 bytes that is to be read
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* (this is run in a 32-bit process looking at a 64-bit process)
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* when I and D space are separate, these will need to be fixed.
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*/
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case PTRACE_PEEKTEXT_3264:
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case PTRACE_PEEKDATA_3264: {
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u32 tmp;
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int copied;
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u32 __user * addrOthers;
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ret = -EIO;
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/* Get the addr in the other process that we want to read */
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if (get_user(addrOthers, (u32 __user * __user *) (unsigned long) addr) != 0)
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break;
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copied = ptrace_access_vm(child, (u64)addrOthers, &tmp,
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sizeof(tmp), FOLL_FORCE);
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if (copied != sizeof(tmp))
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break;
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ret = put_user(tmp, (u32 __user *) (unsigned long) data);
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break;
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}
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/* Read the word at location addr in the USER area. */
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case PTRACE_PEEKUSR: {
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struct pt_regs *regs;
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union fpureg *fregs;
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unsigned int tmp;
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regs = task_pt_regs(child);
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ret = 0; /* Default return value. */
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switch (addr) {
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case 0 ... 31:
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tmp = regs->regs[addr];
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break;
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case FPR_BASE ... FPR_BASE + 31:
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if (!tsk_used_math(child)) {
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/* FP not yet used */
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tmp = -1;
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break;
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}
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fregs = get_fpu_regs(child);
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if (test_thread_flag(TIF_32BIT_FPREGS)) {
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/*
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* The odd registers are actually the high
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* order bits of the values stored in the even
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* registers.
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*/
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tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],
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addr & 1);
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break;
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}
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tmp = get_fpr32(&fregs[addr - FPR_BASE], 0);
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break;
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case PC:
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tmp = regs->cp0_epc;
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break;
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case CAUSE:
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tmp = regs->cp0_cause;
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break;
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case BADVADDR:
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tmp = regs->cp0_badvaddr;
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break;
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case MMHI:
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tmp = regs->hi;
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break;
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case MMLO:
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tmp = regs->lo;
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break;
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case FPC_CSR:
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tmp = child->thread.fpu.fcr31;
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break;
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case FPC_EIR:
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/* implementation / version register */
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tmp = boot_cpu_data.fpu_id;
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break;
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case DSP_BASE ... DSP_BASE + 5: {
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dspreg_t *dregs;
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if (!cpu_has_dsp) {
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tmp = 0;
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ret = -EIO;
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goto out;
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}
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dregs = __get_dsp_regs(child);
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tmp = (unsigned long) (dregs[addr - DSP_BASE]);
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break;
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}
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case DSP_CONTROL:
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if (!cpu_has_dsp) {
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tmp = 0;
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ret = -EIO;
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goto out;
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}
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tmp = child->thread.dsp.dspcontrol;
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break;
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default:
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tmp = 0;
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ret = -EIO;
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goto out;
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}
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ret = put_user(tmp, (unsigned __user *) (unsigned long) data);
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break;
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}
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/*
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* Write 4 bytes into the other process' storage
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* data is the 4 bytes that the user wants written
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* addr is a pointer in the user's storage that contains an
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* 8 byte address in the other process where the 4 bytes
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* that is to be written
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* (this is run in a 32-bit process looking at a 64-bit process)
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* when I and D space are separate, these will need to be fixed.
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*/
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case PTRACE_POKETEXT_3264:
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case PTRACE_POKEDATA_3264: {
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u32 __user * addrOthers;
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/* Get the addr in the other process that we want to write into */
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ret = -EIO;
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if (get_user(addrOthers, (u32 __user * __user *) (unsigned long) addr) != 0)
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break;
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ret = 0;
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if (ptrace_access_vm(child, (u64)addrOthers, &data,
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sizeof(data),
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FOLL_FORCE | FOLL_WRITE) == sizeof(data))
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break;
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ret = -EIO;
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break;
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}
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case PTRACE_POKEUSR: {
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struct pt_regs *regs;
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ret = 0;
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regs = task_pt_regs(child);
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switch (addr) {
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case 0 ... 31:
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regs->regs[addr] = data;
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/* System call number may have been changed */
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if (addr == 2)
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mips_syscall_update_nr(child, regs);
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else if (addr == 4 &&
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mips_syscall_is_indirect(child, regs))
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mips_syscall_update_nr(child, regs);
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break;
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case FPR_BASE ... FPR_BASE + 31: {
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union fpureg *fregs = get_fpu_regs(child);
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if (!tsk_used_math(child)) {
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/* FP not yet used */
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memset(&child->thread.fpu, ~0,
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sizeof(child->thread.fpu));
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child->thread.fpu.fcr31 = 0;
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}
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if (test_thread_flag(TIF_32BIT_FPREGS)) {
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/*
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* The odd registers are actually the high
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* order bits of the values stored in the even
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* registers.
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*/
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set_fpr32(&fregs[(addr & ~1) - FPR_BASE],
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addr & 1, data);
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break;
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}
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set_fpr64(&fregs[addr - FPR_BASE], 0, data);
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break;
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}
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case PC:
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regs->cp0_epc = data;
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break;
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case MMHI:
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regs->hi = data;
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break;
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case MMLO:
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regs->lo = data;
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break;
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case FPC_CSR:
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child->thread.fpu.fcr31 = data;
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break;
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case DSP_BASE ... DSP_BASE + 5: {
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dspreg_t *dregs;
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if (!cpu_has_dsp) {
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ret = -EIO;
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break;
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}
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dregs = __get_dsp_regs(child);
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dregs[addr - DSP_BASE] = data;
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break;
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}
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case DSP_CONTROL:
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if (!cpu_has_dsp) {
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ret = -EIO;
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break;
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}
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child->thread.dsp.dspcontrol = data;
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break;
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default:
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/* The rest are not allowed. */
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ret = -EIO;
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break;
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}
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break;
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}
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case PTRACE_GETREGS:
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ret = ptrace_getregs(child,
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(struct user_pt_regs __user *) (__u64) data);
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break;
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case PTRACE_SETREGS:
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ret = ptrace_setregs(child,
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(struct user_pt_regs __user *) (__u64) data);
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break;
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case PTRACE_GETFPREGS:
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ret = ptrace_getfpregs(child, (__u32 __user *) (__u64) data);
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break;
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case PTRACE_SETFPREGS:
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ret = ptrace_setfpregs(child, (__u32 __user *) (__u64) data);
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break;
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case PTRACE_GET_THREAD_AREA:
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ret = put_user(task_thread_info(child)->tp_value,
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(unsigned int __user *) (unsigned long) data);
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break;
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case PTRACE_GET_THREAD_AREA_3264:
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ret = put_user(task_thread_info(child)->tp_value,
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(unsigned long __user *) (unsigned long) data);
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break;
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case PTRACE_GET_WATCH_REGS:
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ret = ptrace_get_watch_regs(child,
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(struct pt_watch_regs __user *) (unsigned long) addr);
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break;
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case PTRACE_SET_WATCH_REGS:
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ret = ptrace_set_watch_regs(child,
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(struct pt_watch_regs __user *) (unsigned long) addr);
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break;
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default:
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ret = compat_ptrace_request(child, request, addr, data);
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break;
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}
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out:
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return ret;
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}
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