forked from Minki/linux
df595746fa
When system enter suspend, we can set the DDR IO to high-Z state to save DDR IOs' power consumption, this operation can save many power(from ~26mA@1.5V to ~15mA@1.5V, measured on i.MX6Q SabreSD board, R25) of DDR IOs. To achieve that, we need to copy the suspend code to ocram and run the low level hardware related code(set DDR IOs to high-Z state) in ocram. If there is no ocram space available, then system will still do suspend in external DDR, hence no DDR IOs will be set to high-Z. The OCRAM usage layout is as below, ocram suspend region(4K currently): ======================== high address ====================== . . . ^ ^ ^ imx6_suspend code PM_INFO structure(imx6_cpu_pm_info) ======================== low address ======================= Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
131 lines
4.7 KiB
C
131 lines
4.7 KiB
C
/*
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* Copyright 2004-2007, 2014 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2008 Juergen Beisert, kernel@pengutronix.de
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#ifndef __ASM_ARCH_MXC_HARDWARE_H__
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#define __ASM_ARCH_MXC_HARDWARE_H__
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#ifndef __ASSEMBLY__
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#include <asm/io.h>
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#endif
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#include <asm/sizes.h>
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#define addr_in_module(addr, mod) \
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((unsigned long)(addr) - mod ## _BASE_ADDR < mod ## _SIZE)
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#define IMX_IO_P2V_MODULE(addr, module) \
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(((addr) - module ## _BASE_ADDR) < module ## _SIZE ? \
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(addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0)
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/*
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* This is rather complicated for humans and ugly to verify, but for a machine
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* it's OK. Still more as it is usually only applied to constants. The upsides
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* on using this approach are:
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*
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* - same mapping on all i.MX machines
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* - works for assembler, too
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* - no need to nurture #defines for virtual addresses
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*
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* The downside it, it's hard to verify (but I have a script for that).
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*
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* Obviously this needs to be injective for each SoC. In general it maps the
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* whole address space to [0xf4000000, 0xf5ffffff]. So [0xf6000000,0xfeffffff]
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* is free for per-machine use (e.g. KZM_ARM11_01 uses 64MiB there).
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*
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* It applies the following mappings for the different SoCs:
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*
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* mx1:
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* IO 0x00200000+0x100000 -> 0xf4000000+0x100000
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* mx21:
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* AIPI 0x10000000+0x100000 -> 0xf4400000+0x100000
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* SAHB1 0x80000000+0x100000 -> 0xf5000000+0x100000
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* X_MEMC 0xdf000000+0x004000 -> 0xf5f00000+0x004000
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* mx25:
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* AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000
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* AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000
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* AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000
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* mx27:
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* AIPI 0x10000000+0x100000 -> 0xf4400000+0x100000
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* SAHB1 0x80000000+0x100000 -> 0xf5000000+0x100000
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* X_MEMC 0xd8000000+0x100000 -> 0xf5c00000+0x100000
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* mx31:
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* AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000
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* AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000
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* AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000
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* X_MEMC 0xb8000000+0x010000 -> 0xf5c00000+0x010000
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* SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000
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* mx35:
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* AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000
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* AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000
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* AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000
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* X_MEMC 0xb8000000+0x010000 -> 0xf5c00000+0x010000
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* SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000
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* mx51:
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* TZIC 0x0fffc000+0x004000 -> 0xf4bfc000+0x004000
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* IRAM 0x1ffe0000+0x020000 -> 0xf4fe0000+0x020000
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* DEBUG 0x60000000+0x100000 -> 0xf5000000+0x100000
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* SPBA0 0x70000000+0x100000 -> 0xf5400000+0x100000
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* AIPS1 0x73f00000+0x100000 -> 0xf5700000+0x100000
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* AIPS2 0x83f00000+0x100000 -> 0xf5300000+0x100000
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* mx53:
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* TZIC 0x0fffc000+0x004000 -> 0xf4bfc000+0x004000
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* DEBUG 0x40000000+0x100000 -> 0xf5000000+0x100000
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* SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000
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* AIPS1 0x53f00000+0x100000 -> 0xf5700000+0x100000
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* AIPS2 0x63f00000+0x100000 -> 0xf5300000+0x100000
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* mx6q:
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* SCU 0x00a00000+0x004000 -> 0xf4000000+0x004000
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* CCM 0x020c4000+0x004000 -> 0xf42c4000+0x004000
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* ANATOP 0x020c8000+0x004000 -> 0xf42c8000+0x004000
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* UART4 0x021f0000+0x004000 -> 0xf42f0000+0x004000
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*/
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#define IMX_IO_P2V(x) ( \
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(((x) & 0x80000000) >> 7) | \
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(0xf4000000 + \
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(((x) & 0x50000000) >> 6) + \
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(((x) & 0x0b000000) >> 4) + \
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(((x) & 0x000fffff))))
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#define IMX_IO_ADDRESS(x) IOMEM(IMX_IO_P2V(x))
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#include "mxc.h"
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#include "mx51.h"
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#include "mx53.h"
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#include "mx3x.h"
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#include "mx31.h"
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#include "mx35.h"
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#include "mx2x.h"
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#include "mx21.h"
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#include "mx27.h"
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#include "mx1.h"
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#include "mx25.h"
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#define imx_map_entry(soc, name, _type) { \
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.virtual = soc ## _IO_P2V(soc ## _ ## name ## _BASE_ADDR), \
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.pfn = __phys_to_pfn(soc ## _ ## name ## _BASE_ADDR), \
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.length = soc ## _ ## name ## _SIZE, \
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.type = _type, \
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}
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/* There's a off-by-one betweem the gpio bank number and the gpiochip */
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/* range e.g. GPIO_1_5 is gpio 5 under linux */
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#define IMX_GPIO_NR(bank, nr) (((bank) - 1) * 32 + (nr))
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#endif /* __ASM_ARCH_MXC_HARDWARE_H__ */
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