forked from Minki/linux
5fe7f68016
Playing with the VLAN map of every port to implement "hardware bridging" in the 88E6352 driver was a hack until full 802.1Q was supported. Indeed with 802.1Q port mode "Disabled" or "Fallback", this feature is used to restrict which output ports an input port can egress frames to. A Linux bridge is an untagged VLAN. With full 802.1Q support, we don't need this hack anymore and can use the "Secure" strict 802.1Q port mode. With this mode, the port-based VLAN map still needs to be configured, but all the logic is VTU-centric. This means that the switch only cares about rules described in its hardware VLAN table, which is exactly what Linux bridge expects and what we want. Note also that the hardware bridging was broken with the previous flexible "Fallback" 802.1Q port mode. Here's an example: Port0 and Port1 belong to the same bridge. If Port0 sends crafted tagged frames with VID 200 to Port1, Port1 receives it. Even if Port1 is in hardware VLAN 200, but not Port0, Port1 will still receive it, because Fallback mode doesn't care about invalid VID or non-member source port. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
360 lines
7.9 KiB
C
360 lines
7.9 KiB
C
/*
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* net/dsa/mv88e6352.c - Marvell 88e6352 switch chip support
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*
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* Copyright (c) 2014 Guenter Roeck
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*
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* Derived from mv88e6123_61_65.c
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* Copyright (c) 2008-2009 Marvell Semiconductor
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/delay.h>
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#include <linux/jiffies.h>
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#include <linux/list.h>
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#include <linux/module.h>
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#include <linux/netdevice.h>
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#include <linux/platform_device.h>
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#include <linux/phy.h>
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#include <net/dsa.h>
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#include "mv88e6xxx.h"
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static char *mv88e6352_probe(struct device *host_dev, int sw_addr)
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{
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struct mii_bus *bus = dsa_host_dev_to_mii_bus(host_dev);
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int ret;
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if (bus == NULL)
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return NULL;
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ret = __mv88e6xxx_reg_read(bus, sw_addr, REG_PORT(0), PORT_SWITCH_ID);
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if (ret >= 0) {
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if ((ret & 0xfff0) == PORT_SWITCH_ID_6172)
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return "Marvell 88E6172";
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if ((ret & 0xfff0) == PORT_SWITCH_ID_6176)
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return "Marvell 88E6176";
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if (ret == PORT_SWITCH_ID_6320_A1)
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return "Marvell 88E6320 (A1)";
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if (ret == PORT_SWITCH_ID_6320_A2)
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return "Marvell 88e6320 (A2)";
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if ((ret & 0xfff0) == PORT_SWITCH_ID_6320)
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return "Marvell 88E6320";
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if (ret == PORT_SWITCH_ID_6321_A1)
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return "Marvell 88E6321 (A1)";
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if (ret == PORT_SWITCH_ID_6321_A2)
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return "Marvell 88e6321 (A2)";
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if ((ret & 0xfff0) == PORT_SWITCH_ID_6321)
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return "Marvell 88E6321";
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if (ret == PORT_SWITCH_ID_6352_A0)
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return "Marvell 88E6352 (A0)";
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if (ret == PORT_SWITCH_ID_6352_A1)
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return "Marvell 88E6352 (A1)";
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if ((ret & 0xfff0) == PORT_SWITCH_ID_6352)
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return "Marvell 88E6352";
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}
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return NULL;
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}
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static int mv88e6352_setup_global(struct dsa_switch *ds)
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{
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u32 upstream_port = dsa_upstream_port(ds);
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int ret;
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u32 reg;
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ret = mv88e6xxx_setup_global(ds);
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if (ret)
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return ret;
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/* Discard packets with excessive collisions,
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* mask all interrupt sources, enable PPU (bit 14, undocumented).
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*/
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REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL,
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GLOBAL_CONTROL_PPU_ENABLE | GLOBAL_CONTROL_DISCARD_EXCESS);
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/* Configure the upstream port, and configure the upstream
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* port as the port to which ingress and egress monitor frames
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* are to be sent.
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*/
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reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
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upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
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upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT;
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REG_WRITE(REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
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/* Disable remote management for now, and set the switch's
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* DSA device number.
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*/
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REG_WRITE(REG_GLOBAL, 0x1c, ds->index & 0x1f);
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return 0;
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}
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static int mv88e6352_setup(struct dsa_switch *ds)
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{
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struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
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int ret;
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ret = mv88e6xxx_setup_common(ds);
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if (ret < 0)
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return ret;
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ps->num_ports = 7;
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mutex_init(&ps->eeprom_mutex);
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ret = mv88e6xxx_switch_reset(ds, true);
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if (ret < 0)
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return ret;
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ret = mv88e6352_setup_global(ds);
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if (ret < 0)
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return ret;
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return mv88e6xxx_setup_ports(ds);
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}
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static int mv88e6352_read_eeprom_word(struct dsa_switch *ds, int addr)
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{
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struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
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int ret;
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mutex_lock(&ps->eeprom_mutex);
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ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_EEPROM_OP,
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GLOBAL2_EEPROM_OP_READ |
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(addr & GLOBAL2_EEPROM_OP_ADDR_MASK));
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if (ret < 0)
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goto error;
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ret = mv88e6xxx_eeprom_busy_wait(ds);
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if (ret < 0)
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goto error;
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ret = mv88e6xxx_reg_read(ds, REG_GLOBAL2, GLOBAL2_EEPROM_DATA);
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error:
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mutex_unlock(&ps->eeprom_mutex);
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return ret;
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}
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static int mv88e6352_get_eeprom(struct dsa_switch *ds,
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struct ethtool_eeprom *eeprom, u8 *data)
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{
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int offset;
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int len;
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int ret;
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offset = eeprom->offset;
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len = eeprom->len;
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eeprom->len = 0;
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eeprom->magic = 0xc3ec4951;
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ret = mv88e6xxx_eeprom_load_wait(ds);
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if (ret < 0)
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return ret;
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if (offset & 1) {
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int word;
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word = mv88e6352_read_eeprom_word(ds, offset >> 1);
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if (word < 0)
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return word;
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*data++ = (word >> 8) & 0xff;
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offset++;
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len--;
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eeprom->len++;
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}
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while (len >= 2) {
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int word;
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word = mv88e6352_read_eeprom_word(ds, offset >> 1);
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if (word < 0)
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return word;
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*data++ = word & 0xff;
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*data++ = (word >> 8) & 0xff;
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offset += 2;
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len -= 2;
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eeprom->len += 2;
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}
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if (len) {
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int word;
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word = mv88e6352_read_eeprom_word(ds, offset >> 1);
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if (word < 0)
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return word;
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*data++ = word & 0xff;
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offset++;
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len--;
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eeprom->len++;
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}
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return 0;
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}
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static int mv88e6352_eeprom_is_readonly(struct dsa_switch *ds)
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{
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int ret;
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ret = mv88e6xxx_reg_read(ds, REG_GLOBAL2, GLOBAL2_EEPROM_OP);
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if (ret < 0)
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return ret;
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if (!(ret & GLOBAL2_EEPROM_OP_WRITE_EN))
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return -EROFS;
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return 0;
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}
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static int mv88e6352_write_eeprom_word(struct dsa_switch *ds, int addr,
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u16 data)
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{
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struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
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int ret;
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mutex_lock(&ps->eeprom_mutex);
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ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_EEPROM_DATA, data);
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if (ret < 0)
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goto error;
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ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_EEPROM_OP,
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GLOBAL2_EEPROM_OP_WRITE |
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(addr & GLOBAL2_EEPROM_OP_ADDR_MASK));
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if (ret < 0)
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goto error;
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ret = mv88e6xxx_eeprom_busy_wait(ds);
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error:
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mutex_unlock(&ps->eeprom_mutex);
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return ret;
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}
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static int mv88e6352_set_eeprom(struct dsa_switch *ds,
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struct ethtool_eeprom *eeprom, u8 *data)
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{
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int offset;
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int ret;
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int len;
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if (eeprom->magic != 0xc3ec4951)
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return -EINVAL;
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ret = mv88e6352_eeprom_is_readonly(ds);
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if (ret)
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return ret;
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offset = eeprom->offset;
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len = eeprom->len;
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eeprom->len = 0;
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ret = mv88e6xxx_eeprom_load_wait(ds);
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if (ret < 0)
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return ret;
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if (offset & 1) {
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int word;
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word = mv88e6352_read_eeprom_word(ds, offset >> 1);
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if (word < 0)
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return word;
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word = (*data++ << 8) | (word & 0xff);
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ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word);
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if (ret < 0)
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return ret;
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offset++;
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len--;
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eeprom->len++;
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}
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while (len >= 2) {
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int word;
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word = *data++;
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word |= *data++ << 8;
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ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word);
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if (ret < 0)
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return ret;
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offset += 2;
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len -= 2;
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eeprom->len += 2;
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}
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if (len) {
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int word;
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word = mv88e6352_read_eeprom_word(ds, offset >> 1);
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if (word < 0)
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return word;
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word = (word & 0xff00) | *data++;
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ret = mv88e6352_write_eeprom_word(ds, offset >> 1, word);
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if (ret < 0)
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return ret;
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offset++;
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len--;
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eeprom->len++;
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}
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return 0;
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}
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struct dsa_switch_driver mv88e6352_switch_driver = {
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.tag_protocol = DSA_TAG_PROTO_EDSA,
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.priv_size = sizeof(struct mv88e6xxx_priv_state),
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.probe = mv88e6352_probe,
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.setup = mv88e6352_setup,
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.set_addr = mv88e6xxx_set_addr_indirect,
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.phy_read = mv88e6xxx_phy_read_indirect,
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.phy_write = mv88e6xxx_phy_write_indirect,
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.get_strings = mv88e6xxx_get_strings,
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.get_ethtool_stats = mv88e6xxx_get_ethtool_stats,
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.get_sset_count = mv88e6xxx_get_sset_count,
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.adjust_link = mv88e6xxx_adjust_link,
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.set_eee = mv88e6xxx_set_eee,
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.get_eee = mv88e6xxx_get_eee,
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#ifdef CONFIG_NET_DSA_HWMON
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.get_temp = mv88e6xxx_get_temp,
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.get_temp_limit = mv88e6xxx_get_temp_limit,
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.set_temp_limit = mv88e6xxx_set_temp_limit,
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.get_temp_alarm = mv88e6xxx_get_temp_alarm,
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#endif
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.get_eeprom = mv88e6352_get_eeprom,
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.set_eeprom = mv88e6352_set_eeprom,
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.get_regs_len = mv88e6xxx_get_regs_len,
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.get_regs = mv88e6xxx_get_regs,
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.port_stp_update = mv88e6xxx_port_stp_update,
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.port_pvid_get = mv88e6xxx_port_pvid_get,
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.port_pvid_set = mv88e6xxx_port_pvid_set,
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.port_vlan_add = mv88e6xxx_port_vlan_add,
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.port_vlan_del = mv88e6xxx_port_vlan_del,
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.vlan_getnext = mv88e6xxx_vlan_getnext,
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.port_fdb_prepare = mv88e6xxx_port_fdb_prepare,
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.port_fdb_add = mv88e6xxx_port_fdb_add,
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.port_fdb_del = mv88e6xxx_port_fdb_del,
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.port_fdb_getnext = mv88e6xxx_port_fdb_getnext,
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};
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MODULE_ALIAS("platform:mv88e6172");
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MODULE_ALIAS("platform:mv88e6176");
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MODULE_ALIAS("platform:mv88e6320");
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MODULE_ALIAS("platform:mv88e6321");
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MODULE_ALIAS("platform:mv88e6352");
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