157 lines
4.3 KiB
C
157 lines
4.3 KiB
C
/*
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* Copyright 2012 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include "nv04.h"
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#include <core/gpuobj.h>
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#define NV04_PDMA_SIZE (128 * 1024 * 1024)
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#define NV04_PDMA_PAGE ( 4 * 1024)
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/*******************************************************************************
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* VM map/unmap callbacks
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******************************************************************************/
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static void
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nv04_vm_map_sg(struct nvkm_vma *vma, struct nvkm_memory *pgt,
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struct nvkm_mem *mem, u32 pte, u32 cnt, dma_addr_t *list)
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{
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pte = 0x00008 + (pte * 4);
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nvkm_kmap(pgt);
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while (cnt) {
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u32 page = PAGE_SIZE / NV04_PDMA_PAGE;
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u32 phys = (u32)*list++;
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while (cnt && page--) {
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nvkm_wo32(pgt, pte, phys | 3);
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phys += NV04_PDMA_PAGE;
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pte += 4;
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cnt -= 1;
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}
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}
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nvkm_done(pgt);
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}
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static void
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nv04_vm_unmap(struct nvkm_vma *vma, struct nvkm_memory *pgt, u32 pte, u32 cnt)
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{
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pte = 0x00008 + (pte * 4);
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nvkm_kmap(pgt);
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while (cnt--) {
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nvkm_wo32(pgt, pte, 0x00000000);
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pte += 4;
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}
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nvkm_done(pgt);
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}
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static void
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nv04_vm_flush(struct nvkm_vm *vm)
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{
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}
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/*******************************************************************************
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* VM object
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******************************************************************************/
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int
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nv04_vm_create(struct nvkm_mmu *mmu, u64 offset, u64 length, u64 mmstart,
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struct lock_class_key *key, struct nvkm_vm **pvm)
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{
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return -EINVAL;
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}
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/*******************************************************************************
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* MMU subdev
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******************************************************************************/
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static int
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nv04_mmu_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
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struct nvkm_oclass *oclass, void *data, u32 size,
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struct nvkm_object **pobject)
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{
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struct nvkm_device *device = (void *)parent;
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struct nv04_mmu *mmu;
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struct nvkm_memory *dma;
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int ret;
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ret = nvkm_mmu_create(parent, engine, oclass, "PCIGART",
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"mmu", &mmu);
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*pobject = nv_object(mmu);
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if (ret)
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return ret;
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mmu->base.create = nv04_vm_create;
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mmu->base.limit = NV04_PDMA_SIZE;
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mmu->base.dma_bits = 32;
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mmu->base.pgt_bits = 32 - 12;
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mmu->base.spg_shift = 12;
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mmu->base.lpg_shift = 12;
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mmu->base.map_sg = nv04_vm_map_sg;
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mmu->base.unmap = nv04_vm_unmap;
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mmu->base.flush = nv04_vm_flush;
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ret = nvkm_vm_create(&mmu->base, 0, NV04_PDMA_SIZE, 0, 4096, NULL,
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&mmu->vm);
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if (ret)
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return ret;
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ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST,
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(NV04_PDMA_SIZE / NV04_PDMA_PAGE) * 4 + 8,
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16, true, &dma);
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mmu->vm->pgt[0].mem[0] = dma;
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mmu->vm->pgt[0].refcount[0] = 1;
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if (ret)
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return ret;
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nvkm_kmap(dma);
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nvkm_wo32(dma, 0x00000, 0x0002103d); /* PCI, RW, PT, !LN */
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nvkm_wo32(dma, 0x00004, NV04_PDMA_SIZE - 1);
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nvkm_done(dma);
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return 0;
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}
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void
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nv04_mmu_dtor(struct nvkm_object *object)
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{
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struct nv04_mmu *mmu = (void *)object;
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if (mmu->vm) {
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nvkm_memory_del(&mmu->vm->pgt[0].mem[0]);
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nvkm_vm_ref(NULL, &mmu->vm, NULL);
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}
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if (mmu->nullp) {
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pci_free_consistent(nv_device(mmu)->pdev, 16 * 1024,
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mmu->nullp, mmu->null);
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}
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nvkm_mmu_destroy(&mmu->base);
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}
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struct nvkm_oclass
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nv04_mmu_oclass = {
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.handle = NV_SUBDEV(MMU, 0x04),
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.ofuncs = &(struct nvkm_ofuncs) {
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.ctor = nv04_mmu_ctor,
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.dtor = nv04_mmu_dtor,
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.init = _nvkm_mmu_init,
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.fini = _nvkm_mmu_fini,
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},
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};
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