forked from Minki/linux
d92c796247
This patch adds support for the tnetv107x gpio controller. Key differences between davinci and tnetv107x controllers: - register map - davinci's controller is organized into banks of 32 gpios, tnetv107x has a single space with arrays of registers for in, out, direction, etc. - davinci's controller has separate set/clear registers for output, tnetv107x has a single direct mapped register. This patch does not yet add gpio irq support on this controller. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
162 lines
4.5 KiB
C
162 lines
4.5 KiB
C
/*
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* TI DaVinci GPIO Support
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*
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* Copyright (c) 2006 David Brownell
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* Copyright (c) 2007, MontaVista Software, Inc. <source@mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef __DAVINCI_GPIO_H
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#define __DAVINCI_GPIO_H
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#include <linux/io.h>
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#include <linux/spinlock.h>
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#include <asm-generic/gpio.h>
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#include <mach/irqs.h>
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#include <mach/common.h>
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#define DAVINCI_GPIO_BASE 0x01C67000
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enum davinci_gpio_type {
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GPIO_TYPE_DAVINCI = 0,
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GPIO_TYPE_TNETV107X,
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};
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/*
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* basic gpio routines
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*
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* board-specific init should be done by arch/.../.../board-XXX.c (maybe
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* initializing banks together) rather than boot loaders; kexec() won't
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* go through boot loaders.
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*
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* the gpio clock will be turned on when gpios are used, and you may also
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* need to pay attention to PINMUX registers to be sure those pins are
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* used as gpios, not with other peripherals.
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*
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* On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1). For documentation,
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* and maybe for later updates, code may write GPIO(N). These may be
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* all 1.8V signals, all 3.3V ones, or a mix of the two. A given chip
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* may not support all the GPIOs in that range.
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*
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* GPIOs can also be on external chips, numbered after the ones built-in
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* to the DaVinci chip. For now, they won't be usable as IRQ sources.
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*/
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#define GPIO(X) (X) /* 0 <= X <= (DAVINCI_N_GPIO - 1) */
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/* Convert GPIO signal to GPIO pin number */
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#define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio))
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struct davinci_gpio_controller {
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struct gpio_chip chip;
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int irq_base;
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spinlock_t lock;
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void __iomem *regs;
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void __iomem *set_data;
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void __iomem *clr_data;
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void __iomem *in_data;
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};
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/* The __gpio_to_controller() and __gpio_mask() functions inline to constants
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* with constant parameters; or in outlined code they execute at runtime.
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*
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* You'd access the controller directly when reading or writing more than
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* one gpio value at a time, and to support wired logic where the value
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* being driven by the cpu need not match the value read back.
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*
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* These are NOT part of the cross-platform GPIO interface
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*/
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static inline struct davinci_gpio_controller *
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__gpio_to_controller(unsigned gpio)
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{
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struct davinci_gpio_controller *ctlrs = davinci_soc_info.gpio_ctlrs;
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int index = gpio / 32;
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if (!ctlrs || index >= davinci_soc_info.gpio_ctlrs_num)
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return NULL;
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return ctlrs + index;
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}
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static inline u32 __gpio_mask(unsigned gpio)
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{
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return 1 << (gpio % 32);
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}
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/*
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* The get/set/clear functions will inline when called with constant
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* parameters referencing built-in GPIOs, for low-overhead bitbanging.
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*
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* gpio_set_value() will inline only on traditional Davinci style controllers
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* with distinct set/clear registers.
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*
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* Otherwise, calls with variable parameters or referencing external
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* GPIOs (e.g. on GPIO expander chips) use outlined functions.
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*/
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static inline void gpio_set_value(unsigned gpio, int value)
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{
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if (__builtin_constant_p(value) && gpio < davinci_soc_info.gpio_num) {
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struct davinci_gpio_controller *ctlr;
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u32 mask;
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ctlr = __gpio_to_controller(gpio);
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if (ctlr->set_data != ctlr->clr_data) {
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mask = __gpio_mask(gpio);
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if (value)
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__raw_writel(mask, ctlr->set_data);
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else
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__raw_writel(mask, ctlr->clr_data);
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return;
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}
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}
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__gpio_set_value(gpio, value);
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}
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/* Returns zero or nonzero; works for gpios configured as inputs OR
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* as outputs, at least for built-in GPIOs.
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*
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* NOTE: for built-in GPIOs, changes in reported values are synchronized
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* to the GPIO clock. This is easily seen after calling gpio_set_value()
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* and then immediately gpio_get_value(), where the gpio_get_value() will
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* return the old value until the GPIO clock ticks and the new value gets
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* latched.
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*/
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static inline int gpio_get_value(unsigned gpio)
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{
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struct davinci_gpio_controller *ctlr;
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if (!__builtin_constant_p(gpio) || gpio >= davinci_soc_info.gpio_num)
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return __gpio_get_value(gpio);
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ctlr = __gpio_to_controller(gpio);
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return __gpio_mask(gpio) & __raw_readl(ctlr->in_data);
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}
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static inline int gpio_cansleep(unsigned gpio)
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{
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if (__builtin_constant_p(gpio) && gpio < davinci_soc_info.gpio_num)
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return 0;
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else
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return __gpio_cansleep(gpio);
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}
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static inline int gpio_to_irq(unsigned gpio)
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{
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return __gpio_to_irq(gpio);
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}
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static inline int irq_to_gpio(unsigned irq)
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{
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/* don't support the reverse mapping */
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return -ENOSYS;
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}
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#endif /* __DAVINCI_GPIO_H */
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