forked from Minki/linux
c50c84c3ac
The assember code in arch/s390/kernel uses a few more indirect branches
which need to be done with execute trampolines for CONFIG_EXPOLINE=y.
Cc: stable@vger.kernel.org # 4.16
Fixes: f19fbd5ed6 ("s390: introduce execute-trampolines for branches")
Reviewed-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
81 lines
1.8 KiB
ArmAsm
81 lines
1.8 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright IBM Corp 2000, 2011
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* Author(s): Holger Smolinski <Holger.Smolinski@de.ibm.com>,
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* Denis Joseph Barrow,
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*/
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#include <linux/linkage.h>
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#include <asm/asm-offsets.h>
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#include <asm/nospec-insn.h>
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#include <asm/sigp.h>
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GEN_BR_THUNK %r9
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#
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# Issue "store status" for the current CPU to its prefix page
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# and call passed function afterwards
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#
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# r2 = Function to be called after store status
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# r3 = Parameter for function
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#
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ENTRY(store_status)
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/* Save register one and load save area base */
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stg %r1,__LC_SAVE_AREA_RESTART
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/* General purpose registers */
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lghi %r1,__LC_GPREGS_SAVE_AREA
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stmg %r0,%r15,0(%r1)
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mvc 8(8,%r1),__LC_SAVE_AREA_RESTART
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/* Control registers */
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lghi %r1,__LC_CREGS_SAVE_AREA
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stctg %c0,%c15,0(%r1)
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/* Access registers */
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lghi %r1,__LC_AREGS_SAVE_AREA
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stam %a0,%a15,0(%r1)
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/* Floating point registers */
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lghi %r1,__LC_FPREGS_SAVE_AREA
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std %f0, 0x00(%r1)
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std %f1, 0x08(%r1)
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std %f2, 0x10(%r1)
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std %f3, 0x18(%r1)
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std %f4, 0x20(%r1)
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std %f5, 0x28(%r1)
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std %f6, 0x30(%r1)
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std %f7, 0x38(%r1)
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std %f8, 0x40(%r1)
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std %f9, 0x48(%r1)
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std %f10,0x50(%r1)
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std %f11,0x58(%r1)
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std %f12,0x60(%r1)
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std %f13,0x68(%r1)
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std %f14,0x70(%r1)
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std %f15,0x78(%r1)
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/* Floating point control register */
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lghi %r1,__LC_FP_CREG_SAVE_AREA
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stfpc 0(%r1)
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/* CPU timer */
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lghi %r1,__LC_CPU_TIMER_SAVE_AREA
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stpt 0(%r1)
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/* Store prefix register */
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lghi %r1,__LC_PREFIX_SAVE_AREA
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stpx 0(%r1)
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/* Clock comparator - seven bytes */
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lghi %r1,__LC_CLOCK_COMP_SAVE_AREA
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larl %r4,.Lclkcmp
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stckc 0(%r4)
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mvc 1(7,%r1),1(%r4)
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/* Program status word */
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lghi %r1,__LC_PSW_SAVE_AREA
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epsw %r4,%r5
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st %r4,0(%r1)
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st %r5,4(%r1)
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stg %r2,8(%r1)
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lgr %r9,%r2
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lgr %r2,%r3
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BR_EX %r9
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.section .bss
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.align 8
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.Lclkcmp: .quad 0x0000000000000000
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.previous
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