d81090ed44
With the MMCR0 control bit (PMCCEXT) in ISA v3.1, read access to group B registers is restricted when MMCR0 PMCC=0b00. In other platforms (like power9), the older behaviour works where group B PMU SPRs are readable. Patch creates a selftest which verifies that the test takes a SIGILL when attempting to read PMU registers via helper function "dump_ebb_state" for ISA v3.1. Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com> Tested-by: Nageswara R Sastry <rnsastry@linux.ibm.com <mailto:rnsastry@linux.ibm.com>> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/1621950703-1532-3-git-send-email-atrajeev@linux.vnet.ibm.com
38 lines
1.3 KiB
Makefile
38 lines
1.3 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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include ../../../../../build/Build.include
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noarg:
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$(MAKE) -C ../../
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# The EBB handler is 64-bit code and everything links against it
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CFLAGS += -m64
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TMPOUT = $(OUTPUT)/TMPDIR/
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# Toolchains may build PIE by default which breaks the assembly
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no-pie-option := $(call try-run, echo 'int main() { return 0; }' | \
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$(CC) -Werror $(KBUILD_CPPFLAGS) $(CC_OPTION_CFLAGS) -no-pie -x c - -o "$$TMP", -no-pie)
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LDFLAGS += $(no-pie-option)
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TEST_GEN_PROGS := reg_access_test event_attributes_test cycles_test \
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cycles_with_freeze_test pmc56_overflow_test \
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ebb_vs_cpu_event_test cpu_event_vs_ebb_test \
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cpu_event_pinned_vs_ebb_test task_event_vs_ebb_test \
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task_event_pinned_vs_ebb_test multi_ebb_procs_test \
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multi_counter_test pmae_handling_test \
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close_clears_pmcc_test instruction_count_test \
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fork_cleanup_test ebb_on_child_test \
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ebb_on_willing_child_test back_to_back_ebbs_test \
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lost_exception_test no_handler_test \
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cycles_with_mmcr2_test regs_access_pmccext_test
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top_srcdir = ../../../../../..
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include ../../../lib.mk
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$(TEST_GEN_PROGS): ../../harness.c ../../utils.c ../event.c ../lib.c \
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ebb.c ebb_handler.S trace.c busy_loop.S
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$(OUTPUT)/instruction_count_test: ../loop.S
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$(OUTPUT)/lost_exception_test: ../lib.c
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