linux/arch/x86
Kan Liang ce711ea3ca perf/x86/intel/lbr: Support XSAVES/XRSTORS for LBR context switch
In the LBR call stack mode, LBR information is used to reconstruct a
call stack. To get the complete call stack, perf has to save/restore
all LBR registers during a context switch. Due to a large number of the
LBR registers, this process causes a high CPU overhead. To reduce the
CPU overhead during a context switch, use the XSAVES/XRSTORS
instructions.

Every XSAVE area must follow a canonical format: the legacy region, an
XSAVE header and the extended region. Although the LBR information is
only kept in the extended region, a space for the legacy region and
XSAVE header is still required. Add a new dedicated structure for LBR
XSAVES support.

Before enabling XSAVES support, the size of the LBR state has to be
sanity checked, because:
- the size of the software structure is calculated from the max number
of the LBR depth, which is enumerated by the CPUID leaf for Arch LBR.
The size of the LBR state is enumerated by the CPUID leaf for XSAVE
support of Arch LBR. If the values from the two CPUID leaves are not
consistent, it may trigger a buffer overflow. For example, a hypervisor
may unconsciously set inconsistent values for the two emulated CPUID.
- unlike other state components, the size of an LBR state depends on the
max number of LBRs, which may vary from generation to generation.

Expose the function xfeature_size() for the sanity check.
The LBR XSAVES support will be disabled if the size of the LBR state
enumerated by CPUID doesn't match with the size of the software
structure.

The XSAVE instruction requires 64-byte alignment for state buffers. A
new macro is added to reflect the alignment requirement. A 64-byte
aligned kmem_cache is created for architecture LBR.

Currently, the structure for each state component is maintained in
fpu/types.h. The structure for the new LBR state component should be
maintained in the same place. Move structure lbr_entry to fpu/types.h as
well for broader sharing.

Add dedicated lbr_save/lbr_restore functions for LBR XSAVES support,
which invokes the corresponding xstate helpers to XSAVES/XRSTORS LBR
information at the context switch when the call stack mode is enabled.
Since the XSAVES/XRSTORS instructions will be eventually invoked, the
dedicated functions is named with '_xsaves'/'_xrstors' postfix.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Dave Hansen <dave.hansen@intel.com>
Link: https://lkml.kernel.org/r/1593780569-62993-23-git-send-email-kan.liang@linux.intel.com
2020-07-08 11:38:56 +02:00
..
boot efi/x86: Setup stack correctly for efi_pe_entry 2020-06-17 15:28:58 +02:00
configs compiler: remove CONFIG_OPTIMIZE_INLINING entirely 2020-04-07 10:43:42 -07:00
crypto There are a lot of objtool changes in this cycle, all across the map: 2020-06-01 13:13:00 -07:00
entry The X86 entry, exception and interrupt code rework 2020-06-13 10:05:47 -07:00
events perf/x86/intel/lbr: Support XSAVES/XRSTORS for LBR context switch 2020-07-08 11:38:56 +02:00
hyperv x86/hyperv: allocate the hypercall page with only read and execute bits 2020-06-26 00:27:38 -07:00
ia32 Merge branch 'exec-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ebiederm/user-namespace 2020-06-04 14:07:08 -07:00
include perf/x86/intel/lbr: Support XSAVES/XRSTORS for LBR context switch 2020-07-08 11:38:56 +02:00
kernel perf/x86/intel/lbr: Support XSAVES/XRSTORS for LBR context switch 2020-07-08 11:38:56 +02:00
kvm KVM: VMX: Remove vcpu_vmx's defunct copy of host_pkru 2020-06-23 06:01:29 -04:00
lib * AMD Memory bandwidth counter width fix, by Babu Moger. 2020-06-28 10:35:01 -07:00
math-emu
mm maccess: rename probe_kernel_address to get_kernel_nofault 2020-06-18 11:14:40 -07:00
net bpf, i386: Remove unneeded conversion to bool 2020-05-07 16:29:14 +02:00
oprofile
pci maccess: rename probe_kernel_address to get_kernel_nofault 2020-06-18 11:14:40 -07:00
platform x86/platform/intel-mid: convert to use i2c_new_client_device() 2020-06-19 09:20:25 +02:00
power x86/cpu: Reinitialize IA32_FEAT_CTL MSR on BSP during wakeup 2020-06-15 14:18:37 +02:00
purgatory x86/purgatory: Add -fno-stack-protector 2020-06-16 17:05:07 -07:00
ras treewide: replace '---help---' in Kconfig files with 'help' 2020-06-14 01:57:21 +09:00
realmode Rebase locking/kcsan to locking/urgent 2020-06-11 20:02:46 +02:00
tools .gitignore: add SPDX License Identifier 2020-03-25 11:50:48 +01:00
um mmap locking API: use coccinelle to convert mmap_sem rwsem call sites 2020-06-09 09:39:14 -07:00
video
xen maccess: rename probe_kernel_{read,write} to copy_{from,to}_kernel_nofault 2020-06-17 10:57:41 -07:00
.gitignore .gitignore: add SPDX License Identifier 2020-03-25 11:50:48 +01:00
Kbuild
Kconfig objtool: Fix noinstr vs KCOV 2020-06-18 17:36:33 +02:00
Kconfig.assembler x86/delay: Introduce TPAUSE delay 2020-05-07 16:06:20 +02:00
Kconfig.cpu treewide: replace '---help---' in Kconfig files with 'help' 2020-06-14 01:57:21 +09:00
Kconfig.debug treewide: replace '---help---' in Kconfig files with 'help' 2020-06-14 01:57:21 +09:00
Makefile x86/boot/build: Make 'make bzlilo' not depend on vmlinux or $(obj)/bzImage 2020-04-21 18:10:28 +02:00
Makefile_32.cpu
Makefile.um