745c061f98
The intc-simr interrupt controller on some ColdFire CPUs has a set range of interrupts its supports (64 through 128 or 192 depending on model). We shouldn't be setting this handler for every possible interrupt from 0 to 255. Set more appropriate limits, and this means we can drop the interrupt number check in the mask and unmask routines. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
86 lines
2.0 KiB
C
86 lines
2.0 KiB
C
/*
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* intc-simr.c
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*
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* Interrupt controller code for the ColdFire 5208, 5207 & 532x parts.
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*
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* (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com>
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive
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* for more details.
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*/
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <asm/coldfire.h>
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#include <asm/mcfsim.h>
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#include <asm/traps.h>
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/*
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* There maybe one or two interrupt control units, each has 64
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* interrupts. If there is no second unit then MCFINTC1_* defines
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* will be 0 (and code for them optimized away).
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*/
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static void intc_irq_mask(struct irq_data *d)
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{
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unsigned int irq = d->irq - MCFINT_VECBASE;
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if (MCFINTC1_SIMR && (irq > 64))
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__raw_writeb(irq - 64, MCFINTC1_SIMR);
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else
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__raw_writeb(irq, MCFINTC0_SIMR);
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}
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static void intc_irq_unmask(struct irq_data *d)
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{
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unsigned int irq = d->irq - MCFINT_VECBASE;
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if (MCFINTC1_CIMR && (irq > 64))
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__raw_writeb(irq - 64, MCFINTC1_CIMR);
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else
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__raw_writeb(irq, MCFINTC0_CIMR);
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}
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static int intc_irq_set_type(struct irq_data *d, unsigned int type)
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{
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unsigned int irq = d->irq - MCFINT_VECBASE;
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if (MCFINTC1_ICR0 && (irq > 64))
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__raw_writeb(5, MCFINTC1_ICR0 + irq - 64);
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else
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__raw_writeb(5, MCFINTC0_ICR0 + irq);
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return 0;
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}
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static struct irq_chip intc_irq_chip = {
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.name = "CF-INTC",
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.irq_mask = intc_irq_mask,
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.irq_unmask = intc_irq_unmask,
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.irq_set_type = intc_irq_set_type,
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};
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void __init init_IRQ(void)
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{
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int irq, eirq;
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init_vectors();
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/* Mask all interrupt sources */
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__raw_writeb(0xff, MCFINTC0_SIMR);
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if (MCFINTC1_SIMR)
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__raw_writeb(0xff, MCFINTC1_SIMR);
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eirq = MCFINT_VECBASE + 64 + (MCFINTC1_ICR0 ? 64 : 0);
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for (irq = MCFINT_VECBASE; (irq < eirq); irq++) {
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set_irq_chip(irq, &intc_irq_chip);
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set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH);
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set_irq_handler(irq, handle_level_irq);
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}
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}
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