linux/drivers/gpu
Mark Yao ce3887ed0d drm/rockchip: Optimization vop mode set
Rk3288 vop timing registers is immediately register, when configure
timing on display active time, will cause tearing. use dclk reset is
not a good idea to avoid this tearing. we can avoid tearing by using
standby register.

Vop standby register will take effect at end of current frame, and
go back to work immediately when exit standby.

So we can use standby register to protect this context.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2015-12-28 08:49:48 +08:00
..
drm drm/rockchip: Optimization vop mode set 2015-12-28 08:49:48 +08:00
host1x gpu: host1x: Add Tegra210 support 2015-12-14 10:50:33 +01:00
ipu-v3 gpu: ipu-v3: Assign of_node of child platform devices to corresponding ports 2015-11-24 11:30:17 +01:00
vga vgaarb: fix signal handling in vga_get() 2015-12-11 14:04:44 +10:00
Makefile