cdfc243e7d
Remove the bogus definition of the MBAR register for the ColdFire 532x family. It doesn't have an MBAR register, its peripheral registers are at fixed addresses and are not relative to a settable base. All the code that relyed on this definition existing has been cleaned up. The register address definitions now include the base as required. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
48 lines
1.4 KiB
C
48 lines
1.4 KiB
C
/****************************************************************************/
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/*
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* coldfire.h -- Motorola ColdFire CPU sepecific defines
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*
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* (C) Copyright 1999-2006, Greg Ungerer (gerg@snapgear.com)
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* (C) Copyright 2000, Lineo (www.lineo.com)
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*/
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/****************************************************************************/
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#ifndef coldfire_h
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#define coldfire_h
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/****************************************************************************/
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/*
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* Define master clock frequency. This is essentially done at config
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* time now. No point enumerating dozens of possible clock options
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* here. Also the peripheral clock (bus clock) divide ratio is set
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* at config time too.
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*/
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#ifdef CONFIG_CLOCK_SET
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#define MCF_CLK CONFIG_CLOCK_FREQ
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#define MCF_BUSCLK (CONFIG_CLOCK_FREQ / CONFIG_CLOCK_DIV)
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#else
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#error "Don't know what your ColdFire CPU clock frequency is??"
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#endif
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/*
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* Define the processor support peripherals base address.
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* This is generally setup by the boards start up code.
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*/
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#define MCF_MBAR 0x10000000
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#if defined(CONFIG_M520x)
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#define MCF_IPSBAR 0xFC000000
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#else
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#define MCF_IPSBAR 0x40000000
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#endif
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#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
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defined(CONFIG_M520x)
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#undef MCF_MBAR
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#define MCF_MBAR MCF_IPSBAR
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#endif
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/****************************************************************************/
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#endif /* coldfire_h */
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