Manasi Navare cd96bea7ba drm/i915/icl: Add Voltage swing table for MG PHY DDI Buffer ... This table is used for voltage swing programming sequence during DDI Buffer initialization for MG PHY DDI Buffers on Icelake. v2 (from Paulo): * Fix white space issues. Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180323172419.24911-5-paulo.r.zanoni@intel.com		2018-03-23 14:58:13 -07:00
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drm	drm/i915/icl: Add Voltage swing table for MG PHY DDI Buffer	2018-03-23 14:58:13 -07:00
host1x	gpu: host1x: Use IOMMU groups	2017-12-21 14:52:36 +01:00
ipu-v3	gpu: ipu-v3: allow to build with COMPILE_TEST	2017-12-19 12:49:11 +01:00
vga	vfs: do bulk POLL* -> EPOLL* replacement	2018-02-11 14:34:03 -08:00
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